Spike timing dependent plasticity apparatus, system and method

• US 8,959,040 B1
• Filed: 03/08/2012
• Issued: 02/17/2015
• Est. Priority Date: 03/08/2012
• Status: Active Grant

• Current Assignee: HRL Laboratories LLC (The Boeing Co.)
• Original Assignee: HRL Laboratories LLC (The Boeing Co.)
• Inventors: Cruz-Albrecht, Jose, Petre, Peter, Srinivasa, Narayan
• Primary Examiner(s): Chen, Alan
• Assistant Examiner(s): BUSS, BENJAMIN J
• Application Number:
  US13/415,812
• Time in Patent Office: 1,076 Days
• Field of Search: 706/26, 706/27, 706/33, 706/38, 706/39
• US Class Current: 706/39
• CPC Class Codes: G06N 3/049 Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs
• CPC Class Codes: G06N 3/06 Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
• CPC Class Codes: G06N 3/065 Analogue means
• CPC Class Codes: G06N 3/088 Non-supervised learning, e.g. competitive learning

Abstract

A spike timing dependent plasticity (STDP) apparatus, neuromorphic synapse system and a method provide STDP processing of spike signals. The STDP apparatus includes a first leaky integrator to receive a first spike signal and a second leaky integrator to receive a second spike signal. An output of the first leaky integrator is gated according to the second spike signal to produce a first gated integrated signal and an output of the second leaky integrator is gated according to the first spike signal to produce a second gated integrated signal. The STDP apparatus further includes an output integrator to integrate a difference of the first and second gated integrated signals to produce a weighted signal. The system includes a synapse core and the STDP apparatus. The method includes integrating the spike signals, gating the integrated signals and integrating a difference of the gated integrated signals.

Claims

1. A spike timing dependent plasticity (STDP) apparatus comprising:

a first input transconductance amplifier to receive and amplify a first spike signal;

a first leaky integrator connected to an output of the first input transconductance amplifier to receive and integrate the amplified first spike signal, an output of the first leaky integrator being gated to produce a first gated integrated signal;

a second input transconductance amplifier to receive and amplify a second spike signal;

a second leaky integrator connected to an output of the second input transconductance amplifier to receive and integrate the amplified second spike signal, an output of the second leaky integrator being gated to produce a second gated integrated signal; and

an output integrator to integrate a difference of the first gated integrated signal and the second gated integrated signal to produce a weighted signal at an output of the STDP apparatus,

wherein the first leaky integrator output is gated according to the second spike signal and the second leaky integrator output is gated according to the first spike signal, and wherein one or more of the first leaky integrator, the second leaky integrator and the output integrator is implemented using a physical circuit.

2. The STDP apparatus of claim 1, further comprising:

a first gated transconductance amplifier connected between the output of the first leaky integrator and an input of the output integrator and having an input connected to receive the second spike signal, the first gated transconductance amplifier to gate the first leaky integrator output according to the received second spike signal; and

a second gated transconductance amplifier connected between the output of the second leaky integrator and the input of the output integrator and having an input connected to receive the first spike signal, the second gated transconductance amplifier to gate the second leaky integrator output according to the received first spike signal.

3. The STDP apparatus of claim 2, further comprising a summing circuit having a positive input and a negative input connected to respective outputs of the first gated transconductance amplifier of a first signal path and the second gated transconductance amplifier of a second signal path and having a summing circuit output connected to an input of the output integrator, wherein output signals of both the first gated transconductance amplifier and the second gated transconductance amplifier are current-based signals to be summed together prior to being integrated by the output integrator, and wherein an overall signal gain of the first signal path has a polarity that is opposite an overall signal gain of the second signal path, the opposite polarities providing the difference of the first gated integrated signal and the second gated integrated signal.

4. The STDP apparatus of claim 1, wherein a feedback gain of the first leaky integrator is about 0.1, and wherein a feedback gain of the second leaky integrator is about 0.1.

5. The STDP apparatus of claim 1, wherein one or both of the first leaky integrator and the second leaky integrator comprises a shunt resistor in parallel with a shunt capacitor.

6. The STDP apparatus of claim 1, wherein one or both of the first input transconductance amplifier and the second input transconductance amplifier is a limiting transconductance amplifier to provide signal limiting of a respective one or both of the first spike signal and the second spike signal.

7. A synapse of a neuromorphic system comprising the STDP apparatus of claim 1, the synapse further comprising:

a synapse core comprising a 1-bit digital to analog converter (DAC) having a weight input to receive the weighted signal from the STDP apparatus and an output connected to a synapse output, the synapse core to receive the first spike signal and to produce a spike signal weighted according to the weighted signal at the weight input.

8. The synapse of a neuromorphic system of claim 7, further comprising:

a pre-synaptic neuromorphic neuron to produce a pre-synaptic signal, the pre-synaptic signal being the first spike signal; and

a post-synaptic neuromorphic neuron to receive the weighted spike signal at the synapse output, the post-synaptic neuromorphic neuron to produce a post-synaptic signal, the post-synaptic signal being the second spike signal.

9. A neuromorphic synapse system comprising:

a synapse core to receive a pre-synaptic spike signal and to produce a weighted spike signal, the weighted spike signal being weighted in accordance with a weight signal, wherein the synapse core comprises a 1-bit digital-to-analog converter (DAC) with adjustable gain; and

a spike timing dependent plasticity (STDP) circuit comprising a first gated signal path to amplify the pre-synaptic signal using an input transconductance amplifier and to integrate the amplified pre-synaptic spike signal using a first leaky integrator, a second gated signal path to amplify a post-synaptic spike signal using another input transconductance amplifier and to integrate the amplified post-synaptic spike signal using a second leaky integrator, and an output integrator to integrate a difference between an output signal of the first gated signal path and an output signal of the second gated signal path, the integrated difference being the weight signal,

wherein the first gated signal path is gated according to the post-synaptic spike signal, and wherein the second gated signal path is gated according to the pre-synaptic spike signal.

10. The neuromorphic system of claim 9, wherein the 1 bit digital-to-analog converter (DAC) with adjustable gain is to receive the pre-synaptic spike signal as a voltage spike train and to produce the weighted spike signal as a current spike train, and wherein current spikes of the current spike train have amplitude values determined by the adjustable gain according to the weight signal.

11. The neuromorphic synapse system of claim 9, wherein the first gated signal path comprises:

the first leaky integrator;

the input transconductance amplifier connected to an input of the first leaky integrator; and

a gated transconductance amplifier connected to an output of the first leaky integrator to receive and to gate a first integrated signal produced by the first leaky integrator, wherein a net gain of the first gated signal path is positive.

12. The neuromorphic synapse system of claim 9, wherein the second gated signal path comprises:

the second leaky integrator;

the other input transconductance amplifier connected to an input of the second leaky integrator; and

a gated transconductance amplifier connected to an output of the second leaky integrator to receive and to gate a second integrated signal produced by the second leaky integrator, wherein a net gain of the second gated signal path is negative.

13. The neuromorphic synapse system of claim 9, wherein one or both of the first leaky integrator and the second leaky integrator comprises a shunt resistor in parallel with a shunt capacitor.

14. The neuromorphic synapse system of claim 9, further comprising:

a pre-synaptic neuron circuit to provide the pre-synaptic spike signal to the synapse core and the STDP circuit; and

a post-synaptic neuron circuit to receive the weighted spike signal from the synapse core and to produce the post-synaptic spike signal, the post-synaptic signal to be provided to the STDP circuit.

15. A method of providing spike timing dependent plasticity (STDP) processing of a first spike signal and a second spike signal, the method comprising:

amplifying the first spike signal using a transconductance amplifier;

integrating the amplified first spike signal using a leaky integrator to produce a first integrated signal;

amplifying the second spike signal using another transconductance amplifier;

integrating the amplified second spike signal using another leaky integrator to produce a second integrated signal;

gating the first integrated signal according to the second spike signal to produce a gated first integrated signal;

gating the second integrated signal according to the first spike signal to produce a gated second integrated signal; and

integrating a difference of the gated first integrated signal and the gated second integrated signal to produce a weighted signal.

16. The method of providing STDP processing of claim 15, wherein gating the first integrated signal comprises:

using a first gated transconductance amplifier to provide the gating of the first integrated signal, the first gated transconductance amplifier to convert the first integrated signal from a voltage-based signal to a current-based signal of a first signal path; and

wherein gating the second integrated signal comprises using a second gated transconductance amplifier to provide the gating of the second integrated signal, the second gated transconductance amplifier to convert the second integrated signal from a voltage-based signal to a current-based signal of a second signal path.

17. The method of providing STDP processing of claim 16, further comprising summing together the current-based gated first integrated signal and the current-based gated second integrated signal prior to integrating the difference,

wherein an overall signal gain of the first signal path that produces the current-based gated first integrated signal has a polarity that is opposite a polarity of an overall signal gain of the second signal path that produces the current-based gated second integrated signal, the opposite polarities providing the difference of the gated first integrated signal and the gated second integrated signal.

18. The method of providing STDP processing of claim 15, further comprising:

providing the first spike signal using a pre-synaptic neuromorphic neuron, the first spike signal being a pre-synaptic signal;

processing the pre-synaptic signal using a synapse core to produce an output spike signal that is weighted according to the weighting signal; and

receiving the output spike signal with a post-synaptic neuromorphic neuron to produce a post-synaptic signal, the post-synaptic signal being the second spike signal.

19. A neuromorphic synapse system comprising:

a synapse core to receive a pre-synaptic spike signal and to produce a weighted spike signal, the weighted spike signal being weighted in accordance with a weight signal; and

a spike timing dependent plasticity (STDP) circuit comprising;

a first gated signal path to amplify the pre-synaptic spike signal using an input transconductance amplifier and to integrate the amplified pre-synaptic spike signal using a first leaky integrator;

a second gated signal path to amplify a post-synaptic spike signal using another input transconductance amplifier and to integrate the amplified postsynaptic spike signal using a second leaky integrator; and

an output integrator to integrate a difference between an output signal of the first gated signal path and an output signal of the second gated signal path, the integrated difference being the weight signal,

wherein the first gated signal path is gated according to the post-synaptic spike signal, and wherein the second gated signal path is gated according to the presynaptic spike signal.

20. The neuromorphic synapse system of claim 19, wherein the first gated signal path comprises:

the first leaky integrator;

the input transconductance amplifier connected to an input of the first leaky integrator; and

a gated transconductance amplifier connected to an output of the first leaky integrator to receive and to gate a first integrated signal produced by the first leaky integrator, wherein a net gain of the first gated signal path is positive.

21. The neuromorphic synapse system of claim 19, wherein the second gated signal path comprises:

the second leaky integrator;

the other input transconductance amplifier connected to an input of the second leaky integrator; and

a gated transconductance amplifier connected to an output of the second leaky integrator to receive and to gate a second integrated signal produced by the second leaky integrator, wherein a net gain of the second gated signal path is negative.