Multi-layer interconnect with isolation layer

• US 8,962,482 B2
• Filed: 09/08/2006
• Issued: 02/24/2015
• Est. Priority Date: 11/14/2003
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Albertson, Todd, Miller, Darin, Anderson, Mark
• Primary Examiner(s): Tran, Tony
• Application Number:
  US11/530,150
• Publication Number:
  US 20070020928A1
• Time in Patent Office: 3,091 Days
• Field of Search: 438/672, 438/618
• US Class Current: 438/672
• CPC Class Codes: H01L 21/76801 characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
• CPC Class Codes: H01L 21/76834 formation of thin insulating films on the sidewalls or on top of conductors H01L21/76831 takes precedence

Abstract

An integrated circuit interconnect is fabricated by using a mask to form a via in an insulating layer for a conductive plug. After the plug is formed in the via, a thin (e.g., <100 nm) isolation layer is deposited over the resulting structure. An opening is created in the isolation layer by using the same mask at a different radiation exposure level to make the opening more narrow than the underlying plug. A conductive line is then formed which makes electrical contact with the plug through the opening in the isolation layer. By vertically separating and electrically isolating the conductive plug from adjacent conductive lines, the isolation layer advantageously reduces the likelihood of an undesired electrical short occurring between the conductive plug and a nearby conductive line.

Claims

1. A method of forming an integrated circuit, comprising:

providing an insulating layer;

forming a plurality of vias through the insulating layer, wherein forming the vias comprises masking the insulating layer using a photolithography reticle, with a first positive photoresist film and employing a first radiation exposure level, and etching unmasked areas of the insulating layer;

forming a plurality of conductive plugs through the insulating layer, wherein forming the conductive plugs comprises filling the vias with a conductive material;

depositing an isolation layer over the insulating layer and over the conductive plugs;

after depositing the isolation layer, forming a plurality of openings through the isolation layer, wherein forming the openings comprises masking the isolation layer using the photography reticle, using a second positive photoresist film and employing a second radiation exposure level that is at least about 5% lower than the first radiation exposure level, and etching unmasked areas of the isolation layer, each opening exposing an upper surface of a corresponding one of the conductive plugs and having a width smaller than a corresponding width of the corresponding one of the conductive plugs;

after etching to form the openings, filling the openings with a blanket metal layer comprising aluminum in direct contact with the conductive plugs;

masking the metal layer with a third photoresist film on the metal layer; and

etching the metal after depositing the third photoresist film on the metal layer to form an elongated conductive line, wherein the conductive plugs are formed at one level of a metallization scheme and the elongated conductive line is formed above two or more conductive plugs at a second level of the metallization scheme.

2. The method of claim 1, wherein depositing the isolation layer comprises depositing an oxide.

3. The method of claim 1, wherein depositing the isolation layer comprises depositing silicon nitride.

4. The method of claim 1, wherein depositing the isolation layer comprises depositing a layer with a thickness between about 5 nm and 100 nm.

5. The method of claim 1, further comprising depositing a second insulating material between the conductive line and an adjacent conductive line above the isolation layer.

6. The method of claim 1, wherein depositing the isolation layer comprises depositing the isolation layer directly over the conductive plugs.

7. The method of claim 1, wherein forming the openings comprises employing the second radiation exposure level at about 10% to about 15% below the first radiation exposure level.

8. The method of claim 1, wherein forming the vias comprises employing the first photoresist film having a thickness between about 500 nm and 1,500 nm, and forming the openings comprises employing the second photoresist film having a thickness between about 100 nm and 500 nm.

9. The method of claim 1, wherein forming the conductive plugs further comprising chemical-mechanical polishing prior to depositing the isolation layer.

10. The method of claim 9, wherein forming the conductive plugs comprises filling the vias with tungsten.