Reusing active area mask for trench transfer exposure

• US 8,962,485 B2
• Filed: 05/20/2013
• Issued: 02/24/2015
• Est. Priority Date: 05/20/2013
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: GlobalFoundries, Inc.
• Inventors: Salama, Mohamed, Neogi, Tuhin Guha, Beasor, Scott
• Primary Examiner(s): Nhu, David
• Application Number:
  US13/897,890
• Publication Number:
  US 20140342556A1
• Time in Patent Office: 645 Days
• Field of Search: 438/700, 438/270, 438/31, 438/197, 438/106, 438/243, 438/388, 438/430, 257/E21.006, 257/E21.027, 257/E21.058, 257/E21.165, 257/E21.166, 257/E21.296, 257/E21.487, 257/E21.499, 257/E21.546, 257/E21.585, 257/E29.133, 257/E29.156
• US Class Current: 438/700
• CPC Class Codes: H01L 21/28518 the conductive layers comprising silicides H01L21/28537 takes precedence
• CPC Class Codes: H01L 21/76816 Aspects relating to the layout of the pattern or to the size of vias or trenches layout of the interconnections per se H01L23/528; CAD of ICs G06F30/00
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique

Abstract

A method of silicide formation in a semiconductor fabrication process is disclosed. An active area (RX) mask is used to form an active silicon area, and is then reused to form a trench transfer (TT) area. A trench block (TB) mask is logically ANDed with the active area (RX) mask to form a trench silicide (TS) region.

Claims

1. A method of forming a semiconductor structure, the method comprising:

forming an active silicon (RX) mask;

forming a trench block (TB) mask;

reusing the RX mask as a trench transfer (TT) mask; and

forming a trench silicide (TS) region as a logical AND of the RX mask and the TB mask.

2. The method of claim 1, wherein the TB mask extends above and below the RX mask.

3. The method of claim 1, wherein forming a TB mask comprises forming a bright field mask.

4. The method of claim 1, wherein forming a TB mask comprises forming a dark field mask.

5. The method of claim 1, wherein forming a TB mask comprises forming a TB mask having a width ranging from about 40 nanometers to about 50 nanometers.

6. The method of claim 1, further comprising:

forming a second TB mask, wherein a TB mask pitch ranging from about 90 nanometers to about 100 nanometers is established.

7. The method of claim 1, wherein forming a trench silicide region comprises forming a trench silicide region comprising nickel.

8. The method of claim 1, wherein forming a trench silicide region comprises forming a trench silicide region comprising cobalt.

9. A method of forming a semiconductor structure, the method comprising:

forming an active silicon area using an active silicon (RX) mask;

forming a trench block (TB) mask;

reusing the RX mask as a trench transfer (TT) mask; and

forming a plurality of trench silicide (TS) regions as a logical AND of the RX mask and the TB mask.

10. The method of claim 9, wherein the TB mask extends above and below the RX mask.

11. The method of claim 9, wherein forming a TB mask comprises forming a bright field mask.

12. The method of claim 9, wherein forming a TB mask comprises forming a dark field mask.

13. The method of claim 9, wherein forming a plurality of trench silicide (TS) regions comprises forming each trench silicide (TS) region of the plurality of TS regions as having a width ranging from about 40 nanometers to about 50 nanometers.

14. The method of claim 9, wherein forming a plurality of trench silicide (TS) regions comprises forming trench silicide regions having a pitch ranging from about 90 nanometers to about 100 nanometers is established.

15. The method of claim 9, wherein forming a plurality of trench silicide (TS) regions comprises forming a plurality of trench silicide (TS) regions comprising nickel.

16. The method of claim 9, wherein forming a plurality of trench silicide (TS) regions comprises forming a plurality of trench silicide (TS) regions comprising cobalt.

17. A method of forming a semiconductor structure, the method comprising:

forming an active silicon area using an active silicon (RX) mask;

forming a trench block (TB) mask;

reusing the RX mask as a trench transfer (TT) mask; and

forming a plurality of trench silicide (TS) regions as a logical AND of the RX mask and the TB mask, wherein each TS region of the plurality of TS regions is disposed between two gate regions.

18. The method of claim 17, wherein forming a plurality of trench silicide (TS) regions comprises forming each trench silicide (TS) region of the plurality of TS regions as having a width ranging from about 40 nanometers to about 50 nanometers.

19. The method of claim 17, wherein forming a plurality of trench silicide (TS) regions comprises forming a plurality of trench silicide (TS) regions comprising nickel.

20. The method of claim 17, wherein forming a plurality of trench silicide (TS) regions comprises forming a plurality of trench silicide (TS) regions comprising cobalt.