Back-side illuminated image sensor with a junction insulation

• US 8,963,273 B2
• Filed: 04/07/2014
• Issued: 02/24/2015
• Est. Priority Date: 04/12/2011
• Status: Active Grant

• Current Assignee: Stmicroelectronics France (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SA (STMicroelectronics NV), STMicroelectronics SAS (STMicroelectronics NV)
• Inventors: Marty, Michel, Roy, Franois, Prima, Jens
• Primary Examiner(s): DANG, PHUC T
• Application Number:
  US14/247,084
• Publication Number:
  US 20140217541A1
• Time in Patent Office: 323 Days
• Field of Search: 257/447, 257/480, 257/481, 257/483, 438/57, 438/96
• US Class Current: 257/447
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14683 Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof not peculiar thereto H01L21/00
• CPC Class Codes: H01L 27/14687 Wafer level processing
• CPC Class Codes: H01L 27/14689 MOS based technologies

Abstract

A method for forming a back-side illuminated image sensor, including the steps of: a) forming, from the front surface, doped polysilicon regions, of a conductivity type opposite to that of the substrate, extending in depth orthogonally to the front surface and emerging into the first layer; b) thinning the substrate from its rear surface to reach the polysilicon regions, while keeping a strip of the first layer; c) depositing, on the rear surface of the thinned substrate, a doped amorphous silicon layer, of a conductivity type opposite to that of the substrate; and d) annealing at a temperature capable of transforming the amorphous silicon layer into a crystallized layer.

Claims

1. A back-side illuminated image sensor, comprising:

semiconductor substrate of a first conductivity type having a front surface and a rear surface;

a first semiconductor layer of the first conductivity type extending on the rear surface of the substrate, the first semiconductor layer having a higher doping level than the substrate, a front surface on the substrate, and a rear surface;

a second semiconductor layer of a second conductivity type, opposite to the first conductivity type, extending on the rear surface of the first semiconductor layer, the second semiconductor layer having a front surface, on the rear surface of the first semiconductor layer, and a rear surface; and

doped polysilicon regions, of the second conductivity type, extending orthogonally from the front surface of the substrate to the front surface of said second semiconductor.

2. The sensor of claim 1, further comprising third semiconductor layers of the first conductivity type extending between the polysilicon regions and the substrate and separating the polysilicon regions from the substrate, the third semiconductor layers having a higher doping level than the substrate.

3. The sensor of claim 2, wherein:

said third semiconductor layers contact the first semiconductor layer;

the first and second semiconductor layers form a first PN junction that insulates a the rear surface of the substrate from dark currents; and

the polysilicon portions and third semiconductor layers form second PN junctions that laterally insulate portions of the substrate photodiodes and control transistors of the sensor.

4. The sensor of claim 1, further comprising contacting areas positioned directly on front surfaces of said polysilicon regions, enabling, in operation, to bias said polysilicon regions and said second semiconductor layer.

5. The sensor of claim 1, wherein said second semiconductor layer has a thickness ranging between 1 and 10 nm.

6. The sensor of claim 1, wherein said polysilicon regions delimit substrate portions containing photodiodes and control transistors of the sensor.

7. The sensor of claim 1, wherein the first and second semiconductor layers form a first PN junction that insulates the rear surface of the substrate from dark currents.

8. The sensor of claim 1, further comprising:

an insulating layer on the rear surface of the second semiconductor layer;

an antireflection layer on the insulating layer;

a filtering layer on the antireflection layer; and

microlenses on the filtering layer.