System and method for accelerated sampling

• US 8,964,464 B2
• Filed: 08/22/2011
• Issued: 02/24/2015
• Est. Priority Date: 08/24/2010
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: DensBits Technologies Ltd. (Broadcom, Inc.)
• Inventors: Weingarten, Hanan, Sabbag, Erez
• Primary Examiner(s): NGUYEN, HIEN N
• Application Number:
  US13/214,485
• Publication Number:
  US 20120051144A1
• Time in Patent Office: 1,282 Days
• Field of Search: 365/185.03, 365/185.24, 365/185.12, 365/185.29
• US Class Current: 365/185.03
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits

Abstract

A system and method for reading memory cells in a multi-level cell memory device. A set of thresholds may be received for reading a current page of the memory cells. The set of threshold may include hard decision thresholds for hard decoding, soft decision thresholds for soft decoding, erase thresholds for erase decoding and/or other combinations of thresholds. The set of thresholds may be divided into a plurality of groups of thresholds. The current page may be simultaneously read using multiple thresholds, where each of the multiple thresholds is divided into a different group of thresholds.

Claims

1. A method for reading memory cells in a memory device, the method comprising:

receiving a set of thresholds for reading a current page of the memory cells;

dividing the set of thresholds into a plurality of groups of thresholds; and

simultaneously reading the current page using multiple thresholds, where each of the multiple thresholds is divided into a different group of thresholds.

2. The method of claim 1 comprising receiving a single multi-threshold read instruction defining the multiple thresholds to trigger simultaneously reading the multiple thresholds.

3. The method of claim 2, wherein the single multi-threshold read instruction is a native instruction in the memory device.

4. The method of claim 1 comprising iteratively reading the current page using different combinations of multiple thresholds until the current page is read with all thresholds in the set.

5. The method of claim 1, wherein simultaneously reading using multiple thresholds comprises reading using the multiple thresholds in a single read instruction, wherein during the single read instruction the current page is separately read using each individual threshold in rapid-fire succession.

6. The method of claim 1 comprising labeling thresholds differently in each group, wherein the simultaneously read multiple thresholds each have a different group label.

7. The method of claim 1, wherein each different label is assigned to a bin for a different bit value for one or more pages.

8. The method of claim 7, wherein the labels include a group value and a bin value.

9. The method of claim 1, wherein the simultaneously read multiple thresholds are separated by equally spaced voltage gaps.

10. The method of claim 1, wherein the simultaneously read multiple thresholds are separated by differently spaced voltage gaps.

11. The method of claim 1, wherein the thresholds in the set are divided at one or more hard decision thresholds for reading one or more pages.

12. The method of claim 11, wherein the current page is an LSB page and the thresholds in the set are divided at hard decision thresholds for MSB and CSB pages.

13. The method of claim 11, wherein the current page is an MSB page and the thresholds in the set are divided at hard decision thresholds for MSB and CSB pages.

14. The method of claim 1 comprising reading multiple pages of the memory cells in parallel.

15. The method of claim 1, wherein the set of thresholds includes hard decision thresholds and soft decision thresholds.

16. The method of claim 15, wherein the set of thresholds includes 2^N−

1 thresholds for generating N-bit resolution soft bit information.

17. The method of claim 1, wherein the set of thresholds includes hard decision thresholds and erase thresholds, wherein two erase thresholds surround each hard decision threshold to form a predefined voltage range of thresholds sufficiently close to the hard decision threshold surrounded thereby, wherein the erase thresholds are used to generate erase bit information indicating if cells are within the predefined voltage range.

18. The method of claim 17, comprising evaluating the reliability of one or more hard thresholds by simultaneously reading the current page using two erase thresholds surrounding each hard threshold and generating a set of reliable cells having a threshold value within the predefined voltage range.

19. The method of claim 18, comprising repeatedly reading the current page using erase thresholds surrounding all heard decision thresholds and operating on results from said repeatedly reading to generate a set of all reliable cells having a threshold value within the predefined voltage range.

20. The method of claim 1, wherein the multiple thresholds are simultaneously sampled to simultaneously compute the number of cells in multiple bins.

21. The method of claim 20 comprising:

reading each page of the memory cells simultaneously using a first set of multiple thresholds with voltages equal to lower voltages of two or more of the multiple bins;

counting the number of the memory cells in each page that conduct using the first set of multiple thresholds;

reading each page of the memory cells simultaneously using a second set of multiple thresholds with voltages equal to upper voltages of the two or more bins;

counting the number of the memory cells in each page that conduct using the second set of multiple thresholds; and

determining the number of cell in each of the two or more bins to be the difference between the number of memory cells counted for each bin using the first and second sets of threshold values.