Processor agnostic data storage in a PCIE based shared storage enviroment
First Claim
1. A method comprising:
- receiving, by a first controller device of a plurality of controller devices associated with a disk array that comprises a plurality of storage devices and a processor, a request from a host machine that is at a remote location from the disk array, wherein the plurality of storage devices comprise Peripheral Component Interconnect Express (PCIE) based solid state storage devices;
determining, by the first controller device, a nature of the request to be at least one of a data request or a control request based on metadata of the request;
responsive to determining that the request is a data request, performing the following comprising;
converting, by the first controller device, a format of the data request from a first format to a second format that is compatible with the plurality of storage devices, wherein the first format is a format other than a non-volatile memory express (NVMe) format, and wherein converting the data request to the second format comprises converting the data request to the NVMe format; and
routing the data request in the second format directly to at least one storage device of the plurality of storage devices, bypassing the processor of the disk array, based on a mapping table, residing in a memory of the first controller device, that represents an association of the at least one storage device to the first controller device, the association comprising first locations on the at least one storage device that are accessible to the first controller device, wherein at least one of the mapping table or an additional mapping table further represents an additional association of the at least one storage device to a second controller device of the plurality of controller devices, the additional association comprising second locations on the at least one storage device that are accessible to the second controller device.
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Abstract
Disclosed are a system, a method and/or an apparatus of processor agnostic data storage in a PCIE based shared storage environment. In one aspect, a method includes processing a storage based request received at an adapter circuit of a controller device associated with a disk array to direct the storage based request to at least one of a processor of the disk array and a plurality of storage devices of the disk array. The method also includes routing, through an interface circuit of the controller device, the data request in the other format compatible with the storage device directly to at least one storage device of the plurality of storage devices of the disk array coupled to the controller device agnostic to a processor of the disk array to store a data associated with the data request based on a mapping table.
93 Citations
16 Claims
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1. A method comprising:
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receiving, by a first controller device of a plurality of controller devices associated with a disk array that comprises a plurality of storage devices and a processor, a request from a host machine that is at a remote location from the disk array, wherein the plurality of storage devices comprise Peripheral Component Interconnect Express (PCIE) based solid state storage devices; determining, by the first controller device, a nature of the request to be at least one of a data request or a control request based on metadata of the request; responsive to determining that the request is a data request, performing the following comprising; converting, by the first controller device, a format of the data request from a first format to a second format that is compatible with the plurality of storage devices, wherein the first format is a format other than a non-volatile memory express (NVMe) format, and wherein converting the data request to the second format comprises converting the data request to the NVMe format; and routing the data request in the second format directly to at least one storage device of the plurality of storage devices, bypassing the processor of the disk array, based on a mapping table, residing in a memory of the first controller device, that represents an association of the at least one storage device to the first controller device, the association comprising first locations on the at least one storage device that are accessible to the first controller device, wherein at least one of the mapping table or an additional mapping table further represents an additional association of the at least one storage device to a second controller device of the plurality of controller devices, the additional association comprising second locations on the at least one storage device that are accessible to the second controller device. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A controller device, comprising:
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an adapter circuit to receive a request from a host machine; a logic circuit, coupled to the adapter circuit, to; determine a nature of the request to be at least one of a data request or a control request based on metadata of the request; and convert a format of the request from a first format to a second format compatible with a plurality of storage devices of a disk array responsive to a determination that the request is a data request, wherein the plurality of storage devices comprise Peripheral Component Interconnect Express (PCIE) based solid state storage devices, wherein the first format is a format other than a non-volatile memory express (NVMe) format, and wherein converting the data request to the second format comprises converting the data request to the NVMe format; and an interface circuit, coupled to the logic circuit, to route the data request in the second format to at least one storage device of the plurality of storage devices of the disk array, bypassing a processor of the disk array, based on a mapping table, residing in a memory of the controller device that is mapped in a memory of the disk array, that represents an association of the at least one storage device to the controller device, the association comprising first locations on the at least one storage device that are accessible to the controller device, wherein at least one of the mapping table or an additional mapping table further represents an additional association of the at least one storage device to an additional controller device, the additional association comprising second locations on the at least one storage device that are accessible to the additional controller device.
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9. A disk array comprising:
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a plurality of storage devices, wherein the plurality of storage devices comprise Peripheral Component Interconnect Express (PCIE) based solid state storage devices; a processor; and a first controller device coupled to the processor and to the plurality of storage devices, the first controller device comprising; an adapter circuit to receive a request from a host machine; a logic circuit to distinguish a nature of the request to be at least one of a data request or a control request based on metadata of the request, and to convert a format of the request from a first format to a second format that is compatible with the plurality of storage devices responsive to a determination that the request is a data request, wherein the first format is a format other than a non-volatile memory express (NVMe) format, and wherein converting the data request to the second format comprises converting the data request to the NVMe format; and an interface circuit to route the data request in the second format to at least one storage device of the plurality of storage devices, bypassing the processor, based on a mapping table, residing in a memory of the first controller device, that represents an association of the at least one storage device to the first controller device, the association comprising first locations on the at least one storage device that are accessible to the first controller device; and a second controller device coupled to the processor and to the plurality of storage devices, the second controller device comprising an additional interface circuit to route an additional data request in the second format to the at least one storage device of the plurality of storage devices, bypassing the processor, based on at least one of the mapping table or an additional mapping table, residing in an additional memory of the second controller device, that represents an additional association of the at least one storage device to the second controller device, the additional association comprising second locations on the at least one storage device that are accessible to the second controller device. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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Specification