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Vector width-aware synchronization-elision for vector processors

  • US 8,966,461 B2
  • Filed: 09/29/2011
  • Issued: 02/24/2015
  • Est. Priority Date: 09/29/2011
  • Status: Active Grant
First Claim
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1. A non-transitory computer-readable storage medium storing program instructions executable by a computer to implement a compiler configured to:

  • receive program code that specifies a barrier operation, wherein the barrier operation synchronizes execution of a plurality of work items, by pausing execution of one of the plurality of work items until others of the plurality of work items reach a same execution point;

    create a width-specific executable version of the program code, wherein creating the width-specific executable version comprises;

    determining a vector width of a target computer system, wherein the vector width is a number of work items that the target computer system is configured to execute in parallel; and

    in response to the determined vector width meeting one or more criteria, omitting the barrier operation from the width-specific executable version.

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