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Thin film transistor display panel

  • US 8,969,872 B2
  • Filed: 03/07/2013
  • Issued: 03/03/2015
  • Est. Priority Date: 10/16/2012
  • Status: Active Grant
First Claim
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1. A thin film transistor display panel, comprising:

  • a substrate;

    a gate electrode positioned on the substrate;

    a gate insulating layer positioned on the gate electrode;

    a semiconductor layer positioned on the gate insulating layer and comprising a channel portion; and

    a source electrode and a drain electrode positioned on the semiconductor layer and spaced apart from one another;

    wherein a first portion of the semiconductor layer overlaps both the source electrode and the gate electrode, wherein a second portion of the semiconductor layer overlaps both the drain electrode and the gate electrode, wherein the first portion of the semiconductor layer comprises a hill portion that protrudes, and wherein a thickness of the first portion of the semiconductor layer at a first end of the source electrode is larger than a thickness of the second portion of the semiconductor layer at a first end of the drain electrode.

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