Thin film transistor display panel
First Claim
1. A thin film transistor display panel, comprising:
- a substrate;
a gate electrode positioned on the substrate;
a gate insulating layer positioned on the gate electrode;
a semiconductor layer positioned on the gate insulating layer and comprising a channel portion; and
a source electrode and a drain electrode positioned on the semiconductor layer and spaced apart from one another;
wherein a first portion of the semiconductor layer overlaps both the source electrode and the gate electrode, wherein a second portion of the semiconductor layer overlaps both the drain electrode and the gate electrode, wherein the first portion of the semiconductor layer comprises a hill portion that protrudes, and wherein a thickness of the first portion of the semiconductor layer at a first end of the source electrode is larger than a thickness of the second portion of the semiconductor layer at a first end of the drain electrode.
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Accused Products
Abstract
A thin film transistor display panel a includes a transparent substrate; a gate electrode positioned on the substrate; a gate insulating layer positioned on the gate electrode; a semiconductor layer positioned on the gate insulating layer and including a channel region; a source electrode and a drain electrode positioned on the semiconductor layer and facing each other; and a passivation layer configured to cover the source electrode, the drain electrode, and the semiconductor layer, wherein the semiconductor layer includes a relatively thick first portion between the source electrode and the gate electrode and a relatively thinner second portion between the drain electrode and the gate electrode overlap, the relatively thick first portion being sufficiently thick to substantially reduce a charge trapping phenomenon that may otherwise occur at a gate electrode to gate dielectric interface if the first portion were as thin as the second portion.
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Citations
18 Claims
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1. A thin film transistor display panel, comprising:
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a substrate; a gate electrode positioned on the substrate; a gate insulating layer positioned on the gate electrode; a semiconductor layer positioned on the gate insulating layer and comprising a channel portion; and a source electrode and a drain electrode positioned on the semiconductor layer and spaced apart from one another; wherein a first portion of the semiconductor layer overlaps both the source electrode and the gate electrode, wherein a second portion of the semiconductor layer overlaps both the drain electrode and the gate electrode, wherein the first portion of the semiconductor layer comprises a hill portion that protrudes, and wherein a thickness of the first portion of the semiconductor layer at a first end of the source electrode is larger than a thickness of the second portion of the semiconductor layer at a first end of the drain electrode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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Specification