Charging circuit employing a southbridge microchip to control charging when the electronic apparatus is shut down

• US 8,970,175 B2
• Filed: 08/24/2011
• Issued: 03/03/2015
• Est. Priority Date: 06/03/2011
• Status: Active Grant

• Current Assignee: Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd. (Hon Hai Precision Industry Co., Ltd.), Hon Hai Precision Industry Co., Ltd.
• Original Assignee: Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd. (Hon Hai Precision Industry Co., Ltd.), Hon Hai Precision Industry Co., Ltd.
• Inventors: Chen, Chun-Sheng, Zou, Hua, He, Feng-Long
• Primary Examiner(s): Fantu, Yalkew
• Assistant Examiner(s): HERNANDEZ, MANUEL J
• Application Number:
  US13/216,264
• Publication Number:
  US 20120306456A1
• Time in Patent Office: 1,287 Days
• Field of Search: 320/136, 320/107, 320/111, 320/137
• US Class Current: 320/137
• CPC Class Codes: G06F 1/266 Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
• CPC Class Codes: H02J 7/00 Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries

Abstract

A charging circuit employed in an electronic apparatus is operable to charge a portable electronic device. The charging circuit includes a charging control microchip including two control terminals, a southbridge microchip, a logic control circuit, and a basic input/output system (BIOS). The southbridge microchip and the BIOS are both electronically connected to the logic control circuit to control the logic control circuit to set or reset voltage of the two control terminals, then the charging control microchip is switched to a charging mode or a data transmission mode according to the voltage of the two control terminals.

Claims

1. A charging circuit employed in an electronic apparatus for charging a battery of a portable electronic device, comprising:

a charging control microchip including two control terminals;

a logic control circuit electronically connected to the two control terminals;

a southbridge microchip electronically connected to the charging control microchip and the logic control circuit to output different power level control signals to the logic control circuit at different times; and

a basic input/output system (BIOS) electronically connected to the logic control circuit;

wherein the southbridge microchip and the BIOS both control the logic control circuit to output voltage signals to set or reset voltage of the two control terminals, the charging control microchip is switched to a charging mode or a data transmission mode according to the voltage of the two control terminals;

when the electronic apparatus is shut down, the southbridge microchip outputs the power level control signal to the logic control circuit, thereby letting the charging control microchip continually charge the battery of the portable electronic device;

the logic control circuit includes a first metal oxide semiconductor field effect transistor (MOSFET) and a second MOSFET, a gate of the first MOSFET is directly connected to the southbridge microchip, a source of the first MOSFET is directly connected to ground, a drain of the first MOSFET is directly connected to a gate of the second MOSFET, a source of the second MOSFET is directly connected to ground, a drain of the second MOSFET is directly connected to the BIOS and the two control terminals;

the southbridge microchip is operable to output the power level control signal to the gate of the first MOSFET, and the BIOS is operable to output a general purpose input/output (GPIO) control signal to the drain of the second MOSFET;

the power level control signal is logic 1 in response to a sleep mode state of the electronic apparatus;

when the GPIO control signal is logic 1, the two control terminals are both set to logic 1, the charging control microchip is switched to the data transmission mode to exchange data with the portable electronic device.

2. The charging circuit as claimed in claim 1, wherein the logic control circuit further includes a first resistor connected between a power supply and the drain of the first MOSFET.

3. The charging circuit as claimed in claim 1, wherein the logic control circuit further includes a second resistor connected between a power supply and the drain of the second MOSFET.

4. The charging circuit as claimed in claim 1, wherein when the GPIO control signal is logic 0, the two control terminals are both set to logic 0, the charging control microchip is switched to the charging mode to charge the portable electronic device.

5. The charging circuit as claimed in claim 1, wherein when the electronic apparatus is in the sleep mode, the first MOSFET is turned on, and the second MOSFET is cut off.

6. The charging circuit as claimed in claim 1, wherein when the electronic apparatus is powered on, the power level control signal is logic 0, and the two control terminals are both set to logic 0.

7. The charging circuit as claimed in claim 1, wherein the BIOS is electronically connected to the drain of the second MOSFET via a GPIO interface.

8. The charging circuit as claimed in claim 1, wherein the charging control microchip further includes two data terminals and two transmission terminals, the two data terminals are electronically connected to the portable electronic device, and the two transmission terminals are electronically connected to the southbridge microchip.

9. The charging circuit as claimed in claim 8, wherein when the two control terminals are both set to logic 0, the two data terminals are respectively connected to the two transmission terminals so that the portable electronic device can exchange data with the electronic apparatus through the southbridge microchip.

10. A charging circuit employed in an electronic apparatus for charging a battery of a portable electronic device, comprising:

a charging control microchip including two control terminals;

a southbridge microchip electronically connected to the charging control microchip;

a basic input/output system (BIOS); and

a logic control circuit comprising a first metal oxide semiconductor field effect transistor (MOSFET) and a second MOSFET;

wherein a gate of the first MOSFET is directly connected to the southbridge microchip, a source of the first MOSFET is directly connected to ground, a drain of the first MOSFET is directly connected to a gate of the second MOSFET, a source of the second MOSFET is directly connected to ground, a drain of the second MOSFET is directly connected to the BIOS and the two control terminals; and

wherein the southbridge microchip outputs a power level control signal to the gate of the first MOSFET, and the BIOS outputs a general purpose input/output (GPIO) control signal to the drain of the second MOSFET, the logic control circuit sets or resets voltage of the two control terminals according to the power level control signal and the GPIO control signal, the charging control microchip is switched to a charging mode or a data transmission mode according to the voltage of the two control terminals;

the southbridge microchip outputs different power level control signals to the logic control circuit at different times;

when the electronic apparatus is shut down, the southbridge microchip outputs the power level control signal to the logic control circuit, thereby letting the charging control microchip continually charge the battery of the portable electronic device;

the power level control signal is logic 1 in response to a sleep mode state of the electronic apparatus;

when the GPIO control signal is logic 1, the two control terminals are both set to logic 1, the charging control microchip is switched to the data transmission mode to exchange data with the portable electronic device.

11. The charging circuit as claimed in claim 10, wherein when the GPIO control signal is logic 0, the two control terminals are both set to logic 0, the charging control microchip is switched to the charging mode to charge the portable electronic device.