Circuits and devices for generating bi-directional body bias voltages, and methods therefor
First Claim
1. An integrated circuit device, comprising:
- at least a first bi-directional biasing circuit that includesa first substrate portion containing a plurality of first transistors;
a first control digital-to-analog converter (DAC) to generate any of a plurality of first target values in response to a first target code;
a first detect circuit configured to generate a difference value between the first target values and a first limit value; and
at least a first charge pump circuit configured to drive the first substrate portion between a forward body bias voltage and a reverse body bias voltage for the first transistors in response to the first target values.
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Accused Products
Abstract
An integrated circuit device can include at least a first bi-directional biasing circuit having a first substrate portion containing a plurality of first transistors; a first control digital-to-analog converter (DAC) to generate any of a plurality of first target values in response to a first target code; a first detect circuit configured to generate a difference value between the first target values and a first limit value; and at least a first charge pump circuit configured to drive the first substrate portion between a forward body bias voltage and a reverse body bias voltage for the first transistors in response to first target values. Embodiments can also include a performance monitor section configured to determine a difference between the voltage of the first substrate portion and a target voltage. Control logic can generate first code values in response to the difference between the voltage of the first substrate portion and the target voltage. Methods are also disclosed.
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Citations
20 Claims
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1. An integrated circuit device, comprising:
at least a first bi-directional biasing circuit that includes a first substrate portion containing a plurality of first transistors; a first control digital-to-analog converter (DAC) to generate any of a plurality of first target values in response to a first target code; a first detect circuit configured to generate a difference value between the first target values and a first limit value; and at least a first charge pump circuit configured to drive the first substrate portion between a forward body bias voltage and a reverse body bias voltage for the first transistors in response to the first target values. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. An integrated circuit device, comprising:
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at least a first bi-directional biasing circuit configured to drive a first substrate portion containing first transistors to a driven body bias voltage that is between a reverse body bias voltage and a forward body bias voltage in response to first code values; a performance monitor section coupled to at least the first substrate portion and configured to determine a difference between the driven body bias voltage and a first target voltage; and control logic coupled to at least the first bi-directional biasing circuit and configured to generate the first code values in response to the difference between the driven body bias voltage and the first target voltage. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. An integrated circuit device, comprising:
a bi-directional body bias generator configured to generate forward and reverse body bias voltages for a plurality of transistors, including a first digital-to-analog converter (DAC) configured to determine a first current flowing through a first load to generate a first voltage, a second DAC configured to determine a second current flowing through a second load to generate a second voltage, an amplifier configured to generate a detect value in response to the first and second voltages, an oscillator coupled to receive the detect value and generate a plurality of clock signals, and at least one charge pump configured to generate either the forward or reverse body bias voltage in response to at least one of the clock signals. - View Dependent Claims (18, 19, 20)
Specification