Touch sensor integrated type display device and method of manufacturing the same
First Claim
1. A touch sensor integrated type display device comprising:
- a plurality of first electrodes arranged on a substrate in parallel in a first direction;
a plurality of second electrodes arranged in parallel in the first direction and a second direction crossing the first direction without contacting the plurality of first electrodes;
a plurality of first connecting wires, each first connecting wire being connected to at least one of the plurality of the first electrodes; and
a plurality of second connecting wires, each second connecting wire connecting the second electrodes to each other in the second direction,wherein a touch driving voltage is supplied to the plurality of first connecting wires and a common voltage is supplied to the plurality of second connecting wires so that mutual capacitance is generated between the a plurality of first electrodes and the plurality of second electrodes.
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Accused Products
Abstract
A touch sensor integrated type display device capable of reducing its thickness and simplifying its manufacturing process. The display device includes first electrodes, second electrodes, first connecting wires, and second connecting wires. The first electrodes are arranged on a substrate in parallel in a first direction, and the second electrodes are arranged in parallel in the first direction and a second direction crossing the first direction without contacting the first electrodes. Each first connecting wire is connected with at least one the first electrodes. Each second connecting wire connects the second electrodes to each other in the second direction. A touch driving voltage is supplied to the first connecting wires and a common voltage is supplied to the second connecting wires so that mutual capacitance is generated between the first electrodes and the second electrodes.
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Citations
14 Claims
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1. A touch sensor integrated type display device comprising:
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a plurality of first electrodes arranged on a substrate in parallel in a first direction; a plurality of second electrodes arranged in parallel in the first direction and a second direction crossing the first direction without contacting the plurality of first electrodes; a plurality of first connecting wires, each first connecting wire being connected to at least one of the plurality of the first electrodes; and a plurality of second connecting wires, each second connecting wire connecting the second electrodes to each other in the second direction, wherein a touch driving voltage is supplied to the plurality of first connecting wires and a common voltage is supplied to the plurality of second connecting wires so that mutual capacitance is generated between the a plurality of first electrodes and the plurality of second electrodes. - View Dependent Claims (2, 3, 4)
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5. A touch sensor integrated type display device comprising:
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gate lines and data lines formed on a substrate to cross over each other; a plurality of pixel electrodes formed in areas defined by the crossing of the gate lines and the data lines; a plurality of first electrodes arranged in parallel with the gate lines; a plurality of second electrodes arranged in parallel with the gate lines and the data lines without contacting the plurality of first electrodes; a plurality of first connecting wires, each first connecting wire being connected with at least one of the plurality of the first electrodes; and a plurality of second connecting wires, each second connecting wire connecting the second electrodes to each other in parallel with the data line, wherein a touch driving voltage is supplied to the plurality of first connecting wires during a touch mode and a common voltage is supplied to the plurality of second connecting wires during a display mode so that mutual capacitance is generated between the plurality of first electrodes and the plurality of second electrodes. - View Dependent Claims (6, 7, 8, 9)
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10. A method of manufacturing a touch sensor integrated type display device comprising:
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forming a first conductive layer on a substrate; forming a gate line and a gate electrode using first mask process; forming a gate insulation layer on the substrate on which the gate line and the gate electrode are formed, forming a semiconductor layer on the gate insulation layer, and forming a semiconductor pattern on a region of the gate insulation layer corresponding to the gate electrode by patterning the semiconductor layer using a second mask process; forming a data metal layer as a second conductive layer on the gate insulation layer, and forming first conductive pattern group including a data line, a source electrode extended from the data lines and a drain electrode opposite to the source electrode by patterning the data metal layer using a third mask process; forming a first passivation layer on an entire surface of the gate insulation layer on which the first conductive pattern group is formed, and forming a first contact hole exposing a portion of the drain electrode by etching the first passivation layer using a fourth mask process; forming a first transparent conductive layer as a third conductive layer on the first passivation layer in which the first contact hole is formed, and forming a pixel electrode by patterning the first transparent conductive layer using a fifth mask process; forming a second passivation layer and a fourth conductive layer on the first passivation layer on which the pixel electrode is formed, and forming a plurality of first electrodes by etching the fourth conductive layer using a sixth mask process, the plurality of first electrodes being arranged in parallel with the gate line; and forming a third passivation layer on the second passivation layer on which the plurality of first electrodes are formed, forming a second transparent conductive layer as a fifth conductive layer on the third passivation layer, and forming a plurality of second electrodes by etching the second transparent conductive layer using a seventh mask process, the plurality of second electrodes being arranged in parallel with the gate lines and the data lines. - View Dependent Claims (11, 12, 13, 14)
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Specification