Driver circuit, method of manufacturing the driver circuit, and display device including the driver circuit

• US 8,970,999 B2
• Filed: 03/06/2014
• Issued: 03/03/2015
• Est. Priority Date: 06/29/2011
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Koyama, Jun
• Primary Examiner(s): HOUSTON, ADAM D
• Application Number:
  US14/199,377
• Publication Number:
  US 20140185170A1
• Time in Patent Office: 362 Days
• Field of Search: 361/56, 361/21
• US Class Current: 361/56
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2310/0267 Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
• CPC Class Codes: G09G 2310/0275 Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
• CPC Class Codes: G09G 2310/0286 Details of a shift registers arranged for use in a driving circuit
• CPC Class Codes: G09G 2330/04 Display protection
• CPC Class Codes: G09G 3/3283 in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G11C 19/28 using semiconductor elements G11C19/14, G11C19/36 take precedence
• CPC Class Codes: H01L 27/0266 using field effect transistors as protective elements
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H02H 9/044 Physical layout, materials not provided for elsewhere varistors H01C7/12; spark-gaps H01T; Ovshinsky devices H10N70/00
• CPC Class Codes: Y10T 29/49117 Conductor or circuit manufacturing
• CPC Class Codes: Y10T 428/24364 with transparent or protective coating
• CPC Class Codes: Y10T 428/24372 Particulate matter
• CPC Class Codes: Y10T 428/2438 Coated

Abstract

Provided are a driver circuit which suppresses damage of a semiconductor element due to ESD in a manufacturing process, a method of manufacturing the driver circuit. Further provided are a driver circuit provided with a protection circuit with low leakage current, and a method of manufacturing the driver circuit. By providing a protection circuit in a driver circuit to be electrically connected to a semiconductor element in the driver circuit, and by forming, at the same time, a transistor which serves as the semiconductor element in the driver circuit and a transistor included in the protection circuit in the driver circuit, damage of the semiconductor element due to ESD is suppressed in the process of manufacturing the driver circuit. Further, by using an oxide semiconductor film for the transistor included in the protection circuit in the driver circuit, leakage current in the protection circuit is reduced.

Claims

1. A driver circuit comprising:

a first transistor;

a second transistor;

a third transistor; and

a first protection circuit comprising a fourth transistor,

wherein a first terminal of the first transistor is electrically connected to a first clock signal line,

wherein a second terminal of the first transistor is electrically connected to a gate of the second transistor,

wherein a first terminal of the second transistor is electrically connected to a first power supply line,

wherein a second terminal of the second transistor is electrically connected to a gate of the third transistor,

wherein a first terminal of the third transistor is electrically connected to a second clock signal line,

wherein a first terminal of the fourth transistor is electrically connected to the first power supply line, and

wherein a second terminal of the fourth transistor is electrically connected to the gate of the second transistor and a gate of the fourth transistor.

2. The driver circuit according to claim 1,

wherein the fourth transistor comprises an oxide semiconductor film comprising a channel formation region, a source region and a drain region,

wherein at least one of the source region and the drain region comprises a metal element, and

wherein the metal element is at least one of aluminum and magnesium.

3. The driver circuit according to claim 1, further comprising a fifth transistor,

wherein a first terminal of the fifth transistor is electrically connected to the gate of the second transistor, and

wherein a second terminal of the fifth transistor is electrically connected to a second power supply line.

4. The driver circuit according to claim 3, further comprising a second protection circuit comprising a sixth transistor,

wherein the fourth transistor comprises an oxide semiconductor film comprising a channel formation region,

wherein the sixth transistor comprises an oxide semiconductor film comprising a channel formation region,

wherein a first terminal of the sixth transistor is electrically connected to the gate of the second transistor, and

wherein a second terminal of the sixth transistor is electrically connected to the second power supply line and a gate of the sixth transistor.

5. The driver circuit according to claim 4,

wherein the first protection circuit comprises a seventh transistor,

wherein the first terminal of the fourth transistor is electrically connected to the first power supply line through the seventh transistor,

wherein a first terminal of the seventh transistor is electrically connected to the first power supply line, and

wherein a second terminal of the seventh transistor is electrically connected to the first terminal of the fourth transistor.

6. The driver circuit according to claim 5,

wherein the second protection circuit comprises an eighth transistor,

wherein the second terminal of the sixth transistor is electrically connected to the second power supply line through the eighth transistor,

wherein a first terminal of the eighth transistor is electrically connected to the second terminal of the sixth transistor, and

wherein a second terminal of the eighth transistor is electrically connected to the second power supply line and a gate of the eighth transistor.

7. A display device comprising the driver circuit according to claim 6.