System and method for ordering of data transferred over multiple channels

• US 8,971,329 B1
• Filed: 11/18/2008
• Issued: 03/03/2015
• Est. Priority Date: 07/21/2000
• Status: Expired due to Fees

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Silicon Graphics International Corporation (Hewlett-Packard Enterprise Company)
• Inventors: Martin, Randal G., Miller, Steven C., Stadler, Mark D., Kruckemyer, David A.
• Primary Examiner(s): Thier, Michael
• Assistant Examiner(s): HAILE, FEBEN
• Application Number:
  US12/273,453
• Time in Patent Office: 2,296 Days
• Field of Search: 370/229, 370/230, 370/231, 370/235, 370/236, 370/394, 370/412, 370/437, 370/465, 370/389, 370/413, 370/428, 370/429, 370/52, 370/395.4, 370/395.7, 370/395.71
• US Class Current: 370/394
• CPC Class Codes: H04L 45/24 Multipath
• CPC Class Codes: H04L 47/10 Flow control; Congestion control
• CPC Class Codes: H04L 47/26 using explicit feedback to the source, e.g. choke packets
• CPC Class Codes: H04L 47/266 Stopping or restarting the source, e.g. X-on or X-off
• CPC Class Codes: H04L 47/34 ensuring sequence integrity, e.g. using sequence numbers
• CPC Class Codes: H04L 47/39 Credit based
• CPC Class Codes: H04L 47/41 by acting on aggregated flows or links

Abstract

A multiple channel data transfer system (10) includes a source (12) that generates data packets with sequence numbers for transfer over multiple request channels (14). Data packets are transferred over the multiple request channels (14) through a network (16) to a destination (18). The destination (18) re-orders the data packets received over the multiple request channels (14) into a proper sequence in response to the sequence numbers to facilitate data processing. The destination (18) provides appropriate reply packets to the source (12) over multiple response channels (20) to control the flow of data packets from the source (12).

Claims

1. A method for ordering data transferred over multiple channels, comprising:

receiving a plurality of data packets of a particular packet flow over different ones of a plurality of channels, each data packet including a respective sequence number, the plurality of data packets being received in a non-sequential order;

storing each of the plurality of data packets in a buffer according to its respective sequence number;

reading a first one of the plurality of data packets from the buffer according to its respective sequence number in response to storing in the buffer a second one of the plurality of data packets having an adjacent subsequent sequence number, in order to read the plurality of data packets in a sequential order;

setting a valid bit associated with data packets of the plurality of data packets in response to the data packets being stored in the buffer, wherein the valid bit is the next sequential valid bit relative to an immediately preceding valid bit; and

clearing the immediately preceding valid bit in response to data packets associated with the immediately preceding valid bit being read from the buffer.

2. The method of claim 1, further comprising:

monitoring valid bits to identify that the data packets is ready to be read.

3. The method of claim 1, further comprising:

reading the data packets from the buffer in response to the setting of the valid bit associated with the data packets, wherein clearing the valid bit associated with the data packets is in response to the data packets being read from an associated portion of the buffer.

4. The method of claim 3, further comprising:

reading a next sequential data packets to the data packets upon setting of a valid bit associated with the next sequential data packets.

5. The method of claim 1, wherein the sequence number is used to directly index into the buffer.

6. The method of claim 1, further comprising:

generating a flow control credit for each data packet read from the buffer.

7. The method of claim 6, further comprising:

transmitting each flow control credit to a source of the plurality of packets.

8. A non-transitory computer readable medium having embodied thereon a program executable by a processor for ordering data transferred over multiple channels, the executable code operable to cause one or more processors to:

receive a plurality of data packets of a particular packet flow over different ones of a plurality of channels, each data packet including a respective sequence number, the plurality of data packets being received in a non-sequential order;

store each of the plurality of data packets in a buffer according to its respective sequence number;

read a first one of the plurality of data packets from the buffer according to its respective sequence number in response to storing in the buffer a second one of the plurality of data packets having an adjacent subsequent sequence number, in order to read the plurality of data packets in a sequential order;

set a valid bit associated with data packets in response to the data packets associated with an immediately preceding valid bit being stored in the buffer, wherein the valid bit is the next sequential valid bit relative to the immediately preceding valid bit; and

clear the immediately preceding valid bit in response to the data packets associated with the immediately preceding valid bit being read from the buffer.

9. The non-transitory computer readable medium of claim 8, wherein the executable code is further operable to cause the processors to:

monitor valid bits to identify that the data packets are ready to be read.

10. The non-transitory computer readable medium of claim 8, wherein the executable code is further operable to cause the processors to:

read the data packets from the buffer in response to the setting of the valid bit associated with the data packets, wherein clearing the valid bit associated with the data packets is in response to the data packets being read from an associated portion of the buffer.

11. The non-transitory computer readable medium of claim 10, wherein the executable code is further operable to cause the processors to:

read next sequential data packets to the data packets upon setting of the valid bit associated with the next sequential data packets.

12. The non-transitory computer readable medium of claim 8, wherein the sequence number is used to directly index into the buffer.

13. The non-transitory computer readable medium of claim 8, wherein the executable code is further operable to cause the processors to:

generate a flow control credit in response to each data packet being read from the buffer;

and to transmit each flow control credit to a source of the plurality of packets.

14. A system for ordering data transferred over multiple channels, the system comprising:

a processor;

a buffer; and

a memory for storing instructions which when executed from the memory cause the processor to;

receive a plurality of data packets of a particular packet flow in a non-sequential order over different ones of a plurality of channels, each data packet including a respective sequence number, store each of the plurality of data packets according to its respective sequence number in the buffer,

read a first one of the plurality of data packets stored in the buffer according to its respective sequence number in response to storing in the buffer a second one of the plurality of data packets having an adjacent subsequent sequence number, in order to read the plurality of data packets in a sequential order,

set a valid bit associated with data packets in response to the data packets associated with an immediately preceding valid bit being stored in the buffer, wherein the valid bit is the next sequential valid bit relative to the immediately preceding valid bit, and

clear the immediately preceding valid bit in response to the data packets associated with the immediately preceding valid bit being read from the buffer.

15. The system of claim 14, wherein the data packets are read from the buffer in response to the setting of the valid bit associated with the data packets, and wherein the valid bit associated with the data packets is cleared in response to the data packets being read from an associated portion of the buffer.

16. The system of claim 15, wherein next sequential data packets to the data packet is read upon setting of the valid bit associated with the next sequential data packets.

17. The system of claim 14, wherein the sequence number is used to directly index into the buffer.