Cryptographic key generation using a stored input value and a stored count value
First Claim
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1. A processor comprising:
- non-volatile storage storing a random number, a first count value, and a second count value; and
logic to deterministically generate an RSA key pair based on the stored random number, the stored first count value, and the stored second count value, wherein the random number is much smaller than the keys, wherein the logic is to seed a pseudo-random number generator based on the stored random number, iteratively generate a first sequence of pseudo-random numbers based on stored first count value, iteratively generate a second sequence of pseudo-random numbers based on the stored second count value, and use a first and a second output of the pseudo-random number generator to generate the RSA key pair.
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Abstract
Embodiments of an invention for cryptographic key generation using a stored input value and a stored count value have been described. In one embodiment, a processor includes non-volatile storage storing an input value and a count value, and logic to generate a cryptographic key based on the stored input value and the stored count value.
20 Citations
3 Claims
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1. A processor comprising:
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non-volatile storage storing a random number, a first count value, and a second count value; and logic to deterministically generate an RSA key pair based on the stored random number, the stored first count value, and the stored second count value, wherein the random number is much smaller than the keys, wherein the logic is to seed a pseudo-random number generator based on the stored random number, iteratively generate a first sequence of pseudo-random numbers based on stored first count value, iteratively generate a second sequence of pseudo-random numbers based on the stored second count value, and use a first and a second output of the pseudo-random number generator to generate the RSA key pair.
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2. A system comprising:
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non-volatile storage storing a random number, a first count value, and a second count value; and a processor to deterministically generate an RSA key pair based on the stored random number, the stored first count value, and the second count value, wherein the random number is much smaller than the keys, wherein the logic is to seed a pseudo-random number generator based on the stored random number, iteratively generate a first sequence of pseudo-random numbers based on stored first count value, iteratively generate a second sequence of pseudo-random numbers based on the stored second count value, and use a first and a second output of the pseudo-random number generator to generate the RSA key pair.
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3. A non-transitory machine-readable medium including instructions that, when executed, cause a processing system to:
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read an input value and a first count value from a non-volatile memory; seed a deterministic pseudo-random number generator based on the input value; feed the output of the pseudo-random number generator back to the input of the pseudo-random number generator the number of times indicated by the first count value; and generate a cryptographic key based on an output value from the deterministic pseudo-random number generator, wherein generating a cryptographic key includes generating an RSA key pair using as a first prime number a first output value from the pseudo-random number generator after feeding the output of the pseudo-random number generator back to the input of the pseudo-random number generator the number of times indicated by the first count value after seeding the pseudo-random number generator with a first seed value based on the input value, and using as a second prime number a second output value from the pseudo-random number generator after feeding the output of the pseudo-random number generator back to the input of the pseudo-random number generator the number of times indicated by a second count value read after seeding the pseudo-random number generator with a second seed value based on the input value.
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Specification