Semiconductor device and structure for heat removal

• US 8,975,670 B2
• Filed: 07/22/2012
• Issued: 03/10/2015
• Est. Priority Date: 03/06/2011
• Status: Active Grant

• Current Assignee: Monolithic 3D, Inc.
• Original Assignee: Monolithic 3D, Inc.
• Inventors: Or-Bach, Zvi, Sekar, Deepak C., Cronquist, Brian
• Primary Examiner(s): CLARK, JASMINE JHIHAN B
• Application Number:
  US13/555,152
• Publication Number:
  US 20120313227A1
• Time in Patent Office: 961 Days
• Field of Search: 257/659, 257/E23.114
• US Class Current: 257/272
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 27/0688 Integrated circuits having a three-dimensional layout
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device, including: a semiconductor substrate with a first layer including first transistors; a shield layer overlaying the first layer; a second layer overlaying the shield layer, the second layer including second transistors; wherein the shield layer is a mostly continuous layer with a plurality of regions for connections between the first transistors and the second transistors, and where the second transistors include monocrystalline regions.

Claims

1. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, and

wherein said second transistors comprise monocrystalline regions.

2. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors; and

at least one interconnect layer between said first layer and said shield layer,

wherein said at least one interconnect layer comprises aluminum or copper.

3. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors; and

at least one interconnect layer between said first layer and said shield layer,

wherein said shield layer thickness is at least 2 times larger than said interconnection layer thickness.

4. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors; and

a thermal conductive path between said shield layer and said semiconductor substrate,

wherein said thermal conductive path has a thermal conductivity greater than about 10W/m-K.

5. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, and

wherein said shield layer is designed to protect said first transistors from damage due to an optical annealing process used for processing of said second transistors.

6. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, and

wherein said shield layer is designed to protect said first transistors from damage due to an annealing process used for processing of said second transistors.

7. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, and

wherein said shield layer is designed to protect said first transistors from electro-magnetic radiation coming from said second transistors.

8. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, and

wherein said shield layer is designed to protect said second transistors from electro-magnetic radiation coming from said first transistors.

9. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, and

wherein said shield layer is part of power delivery to said second transistors.

10. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, and

wherein said shield layer is designed to spread heat generated by said second transistors.

11. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, and

wherein said shield layer is designed to spread heat generated by an optical annealing process used for the processing of said second transistors.

12. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, and

wherein said shield layer comprises copper or aluminum or tungsten.

13. A semiconductor device, comprising:

a semiconductor substrate with a first layer comprising first transistors;

a shield layer overlaying said first layer;

a second layer overlaying said shield layer, said second layer comprising second transistors,

wherein said shield layer is a mostly continuous layer with a plurality of regions for connections between said first transistors and said second transistors, and

wherein said shield layer comprises materials with a thermal conductivity greater than about 10 W/m-K.