Corner layout for superjunction device
First Claim
1. A termination structure for a semiconductor device, comprising:
- a channel stop field plate on a surface of a semiconductor material proximate an edge of the semiconductor material, wherein the channel stop field plate includes a metal portion and an isolation portion, wherein the metal portion of the channel stop field plate contacts the semiconductor material without a heavily doped implant region or a body region and thereby forming a Schottky style channel stop, and wherein the channel stop field plate is electrically isolated by the isolation portion from areas of the semiconductor device other than where the Schottky style channel stop is formed.
1 Assignment
0 Petitions
Accused Products
Abstract
A superjunction device and methods for layout design and fabrication of a superjunction device are disclosed. A layout of active cell column structures can be configured so that a charge due to first conductivity type dopants balances out charge due to second conductivity type dopants in a doped layer in an active cell region. A layout of end portions of the active cell column structures proximate termination column structures can be configured so that a charge due to the first conductivity type dopants in the end portions and a charge due to the first conductivity type dopants in the termination column structures balances out charge due to the second conductivity type dopants in a portion of the doped layer between the termination column structures and the end portions.
17 Citations
4 Claims
-
1. A termination structure for a semiconductor device, comprising:
a channel stop field plate on a surface of a semiconductor material proximate an edge of the semiconductor material, wherein the channel stop field plate includes a metal portion and an isolation portion, wherein the metal portion of the channel stop field plate contacts the semiconductor material without a heavily doped implant region or a body region and thereby forming a Schottky style channel stop, and wherein the channel stop field plate is electrically isolated by the isolation portion from areas of the semiconductor device other than where the Schottky style channel stop is formed. - View Dependent Claims (2, 3, 4)
Specification