Singulated semiconductor device separable electrical interconnect

• US 8,984,748 B2
• Filed: 06/28/2010
• Issued: 03/24/2015
• Est. Priority Date: 06/29/2009
• Status: Active Grant

• Current Assignee: HSIO Technologies LLC
• Original Assignee: HSIO Technologies LLC
• Inventors: Rathburn, James
• Primary Examiner(s): Angwin, David
• Assistant Examiner(s): Kue, Kaying
• Application Number:
  US13/319,228
• Publication Number:
  US 20120058653A1
• Time in Patent Office: 1,730 Days
• Field of Search: 298/54, 298/74, 298/84, 298/46, 298/30, 298/31, 439/76.1
• US Class Current: 29/854
• CPC Class Codes: G01R 1/0491 for testing integrated circuits on wafers, e.g. wafer-level test cartridge
• CPC Class Codes: G01R 1/0735 arranged on a flexible frame or film
• CPC Class Codes: G01R 3/00 Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments , e.g. of probe tips
• CPC Class Codes: Y10T 29/49126 Assembling bases
• CPC Class Codes: Y10T 29/49128 Assembling formed circuit to base
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49169 Assembling electrical component directly to terminal or elongated conductor
• CPC Class Codes: Y10T 29/49204 Contact or terminal manufacturing
• CPC Class Codes: Y10T 29/49222 forming array of contacts or terminals

Abstract

A socket assembly that forms a solderless electrical interconnection between terminals on a singulated integrated circuit device and another circuit member. The socket housing has an opening adapted to receive the singulated integrated circuit device. The compliant printed circuit is positioned relative to the socket housing to electrically couple with the terminals on a singulated integrated circuit device located in the opening. The compliant printed circuit includes a dielectric base layer printed onto a surface of a fixture, while leaving cavities in the surface of the fixture exposed. A plurality of contact members are formed in the plurality of cavities in the fixture and coupled to the dielectric base layer. The contact members are exposed wherein the compliant printed circuit is removed from the fixture. At least one dielectric layer with recesses corresponding to a target circuit geometry is printed on the dielectric base layer. A conductive material is deposited in at least a portion of the recesses to form conductive traces electrically coupling the contact members to the other circuit member.

Claims

1. A method of making a socket assembly that forms a solderless electrical connection between terminals on a singulated integrated circuit device and another circuit member, the method comprising the steps of:

printing a base layer of a dielectric material onto a surface of a fixture, while leaving cavities in the fixture exposed;

depositing a conductive material into a plurality of the cavities in the fixture;

printing at least one dielectric layer with recesses corresponding to a target circuit geometry on the dielectric base layer;

depositing a conductive material in at least a portion of the recesses comprising conductive traces electrically coupled to the contact members of a compliant printed circuit;

removing the compliant printed circuit from the fixture to expose distal ends of the contact members; and

positioning the compliant printed circuit relative to an opening in a socket housing so the contact members electrically couple with the terminals on a singulated integrated circuit device located in the opening.

2. The method of claim 1 wherein the conductive traces comprise substantially rectangular cross-sectional shapes.

3. The method of claim 1 comprising printing a conductive material, a non-conductive material, and a semi-conductive material on a single layer of the compliant printed circuit.

4. The method of claim 1 comprising:

positioning pre-formed conductive trace materials in recesses of in the dielectric layer; and

plating the recesses of the dielectric layer to form conductive traces with substantially rectangular cross-sectional shapes.

5. The method of claim 1 comprising:

pressing a conductive foil into at least a portion of recesses in the dielectric layer;

shearing the conductive foil along edges of the recesses;

removing excess conductive foil not located in the recesses; and

plating the recesses to form conductive traces with substantially rectangular cross-sectional shapes.

6. The method of claim 1 comprising the step of forming at least one additional circuitry plane in the socket assembly.

7. The method of claim 1 comprising the steps of:

printing at least one electrical device on the socket assembly; and

electrically coupling a plurality of the electrical devices to at least one conductive trace.

8. The method of claim 1 comprising printing an optical quality material in at least a portion of the recesses comprising one or more optical circuit geometries.

9. The method of claim 1 comprising locating one or more optical fibers in at least a portion of the recesses comprising one or more optical circuit geometries.

10. The method of claim 1 wherein the other circuit member is selected from one of a printed circuit board, a flexible circuit, a bare die device, an integrated circuit device, and a test station.

11. A method of making a socket assembly that forms a solderless electrical connection between terminals on a circuit member, the method comprising the steps of:

printing a base layer of a dielectric material onto a surface of a fixture, while leaving cavities in the fixture exposed;

depositing a conductive material into a plurality of the cavities in the fixture;

printing at least one dielectric layer with recesses corresponding to a target circuit geometry on the dielectric base layer;

depositing a conductive material in at least a portion of the recesses comprising conductive traces;

electrically coupling at least one of the conductive traces to at least one of the contact members of a compliant printed circuit;

removing the compliant printed circuit from the fixture to expose distal ends of the contact members;

positioning the compliant printed circuit adjacent to an opening in a housing so that an extension of the compliant printed circuit extends beyond a perimeter edge of the housing; and

electrically coupling the contact members to the terminals on a circuit member located in the opening.

12. The method of claim 11 comprising electrically coupling the extension of the compliant printed circuit to one of a printed circuit board, a test assembly, a packaged integrated circuit, an unpackaged integrated circuit, a flexible circuit, a bare-die device, or an organic or inorganic substrate.