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Biasing scheme for large format CMOS active pixel sensors

  • US 8,988,568 B2
  • Filed: 07/03/2008
  • Issued: 03/24/2015
  • Est. Priority Date: 04/09/2003
  • Status: Active Grant
First Claim
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1. An image sensor comprising:

  • a pixel array including a plurality of column lines;

    a plurality of load transistors, each coupling a respective one of the column lines to a ground line; and

    a plurality of circuits, each respectively coupled to a gate of a load transistor, the plurality of circuits applying a substantially equal gate-source voltage to the gates of each of the load transistors.

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