Ultra-wideband high power amplifier architecture
First Claim
1. An amplifier circuit comprising:
- a power divider configured to receive a radio frequency (RF) input signal;
a first chipset operatively coupled with the power divider and configured to amplify a first sub-band of the input signal;
a second chipset operatively coupled with the power divider and configured to amplify a second sub-band of the input signal; and
a control circuit to control chipset output, the control circuit comprising a temperature sensing circuit configured to detect an ambient temperature change, generate a sense voltage therefrom, and shift a bias voltage supplied to at least one of the first chipset and/or the second chipset based on combination of the sense voltage and the bias voltage;
wherein the input signal is of a given bandwidth, and sub-bands amplified by the amplifier circuit including the first sub-band and the second sub-band, in the aggregate, cover the bandwidth of the input signal.
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Accused Products
Abstract
Techniques and architecture are disclosed for providing an ultra-wideband, multi-channel solid-state power amplifier architecture. In some embodiments, the architecture includes a power divider which splits an input signal and delivers that split signal to a plurality of downstream channel chipsets. Each channel chipset is configured to amplify a sub-band of the original full-band input signal and to provide the resultant amplified sub-band for downstream use, such as for transmission by an antenna operatively coupled with that channel. In the aggregate, the amplified sub-bands provide coverage of the same ultra-wideband frequency range of the original input signal, in some cases. In some embodiments, the architecture provides high radio frequency (RF) power with good amplifying efficiency and ultra-wide instantaneous frequency bandwidth performance in a small-form-factor package. In some instances, control circuitry is provided to control which chipset die(s) are enabled/disabled, thus providing control over gain and power levels of the output signal(s).
36 Citations
21 Claims
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1. An amplifier circuit comprising:
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a power divider configured to receive a radio frequency (RF) input signal; a first chipset operatively coupled with the power divider and configured to amplify a first sub-band of the input signal; a second chipset operatively coupled with the power divider and configured to amplify a second sub-band of the input signal; and a control circuit to control chipset output, the control circuit comprising a temperature sensing circuit configured to detect an ambient temperature change, generate a sense voltage therefrom, and shift a bias voltage supplied to at least one of the first chipset and/or the second chipset based on combination of the sense voltage and the bias voltage; wherein the input signal is of a given bandwidth, and sub-bands amplified by the amplifier circuit including the first sub-band and the second sub-band, in the aggregate, cover the bandwidth of the input signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. An amplifier circuit comprising:
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a power divider configured to receive a radio frequency (RF) input signal; a first chipset operatively coupled with the power divider and configured to amplify a first sub-band of the input signal, the first chipset comprising; a first pre-driver; a first driver operatively coupled with the first pre-driver; and a first high power amplifier operatively coupled with the first driver; a second chipset operatively coupled with the power divider and configured to amplify a second sub-band of the input signal, the second chipset comprising; a second pre-driver; a second driver operatively coupled with the second pre-driver; and a second high power amplifier operatively coupled with the second driver; and a control circuit to control chipset output, the control circuit comprising a temperature sensing circuit configured to detect an ambient temperature change, generate a sense voltage therefrom, and add the sense voltage to a gate bias voltage supplied to at least one of the first pre-driver, the first driver, the first high power amplifier, the second pre-driver, the second driver, and/or the second high power amplifier; wherein at least one of the first pre-driver, the first driver, the first high power amplifier, the second pre-driver, the second driver, and/or the second high power amplifier comprises a gallium-nitride (GaN)-based monolithic microwave integrated circuit (MMIC). - View Dependent Claims (16, 17, 18)
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19. A transmitter comprising:
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a passive, in-phase power divider configured to receive an input signal having a bandwidth of at least 18;
1;a first channel chipset operatively coupled with the passive power divider and configured to amplify a first sub-band of the input signal; a second channel chipset operatively coupled with the passive power divider and configured to amplify a second sub-band of the input signal; a first antenna operatively coupled with the first channel chipset and configured to transmit the first sub-band after amplification thereof by the first channel chipset; a second antenna operatively coupled with the second channel chipset and configured to transmit the second sub-band after amplification thereof by the second channel chipset; and a control circuit to control channel chipset output, the control circuit comprising a temperature sensing circuit configured to detect an ambient temperature change, generate a sense voltage therefrom, and shift a gate bias voltage supplied to at least one of the first channel chipset and/or the second channel chipset based on combination of the sense voltage and the gate bias voltage. - View Dependent Claims (20, 21)
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Specification