Post-silicon validation using a partial reference model
First Claim
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1. A computer-implemented method, the method performed by a device, wherein the device having registers, the method comprising:
- determining an instruction to be generated having a set of input registers and a target register;
determining a combination of values to the input registers for which a partial reference model provides an expected result;
generating a test-case including the instruction, wherein the test-case is configured to initialize the input registers with the combination of values;
first executing, by the device when operating in trace mode, the test-case, wherein during the execution utilizing the partial reference model to determine an expected value of at least one register;
second executing, by the device when operating in non-trace mode, the test-case;
in response to said second executing, checking values of registers based on, at least in part, values determined during said first execution.
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Abstract
Method, system and product for post silicon validation using a partial reference model. The method performed by a device having registers, the method comprising: first executing, by the device when operating in trace mode, a test-case, wherein during the execution utilizing a partial reference model to determine an expected value of at least one register; second executing, by the device when operating in non-trace mode, the test-case; and in response to said second executing, checking values of registers based on, at least in part, values determined during said first execution.
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Citations
10 Claims
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1. A computer-implemented method, the method performed by a device, wherein the device having registers, the method comprising:
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determining an instruction to be generated having a set of input registers and a target register; determining a combination of values to the input registers for which a partial reference model provides an expected result; generating a test-case including the instruction, wherein the test-case is configured to initialize the input registers with the combination of values; first executing, by the device when operating in trace mode, the test-case, wherein during the execution utilizing the partial reference model to determine an expected value of at least one register; second executing, by the device when operating in non-trace mode, the test-case; in response to said second executing, checking values of registers based on, at least in part, values determined during said first execution. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A computer program product comprising:
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a non-transitory computer readable medium storing program instructions, which instructions when executed by a device, cause the device to perform the steps of; determining an instruction to be generated having a set of input registers and a target register; determining a combination of values to the input registers for which a partial reference model provides an expected result; generating the test-case including the instruction, wherein the test-case is configured to initialize the input registers with the combination of values; first executing, by the device when operating in trace mode, the test-case, wherein during the execution utilizing the partial reference model to determine an expected value of at least one register; second executing, by the device when operating in non-trace mode, the test-case; in response to said second executing, checking values of registers based on, at least in part, values determined during said first execution.
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Specification