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Post-silicon validation using a partial reference model

  • US 8,990,622 B2
  • Filed: 07/29/2012
  • Issued: 03/24/2015
  • Est. Priority Date: 07/29/2012
  • Status: Active Grant
First Claim
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1. A computer-implemented method, the method performed by a device, wherein the device having registers, the method comprising:

  • determining an instruction to be generated having a set of input registers and a target register;

    determining a combination of values to the input registers for which a partial reference model provides an expected result;

    generating a test-case including the instruction, wherein the test-case is configured to initialize the input registers with the combination of values;

    first executing, by the device when operating in trace mode, the test-case, wherein during the execution utilizing the partial reference model to determine an expected value of at least one register;

    second executing, by the device when operating in non-trace mode, the test-case;

    in response to said second executing, checking values of registers based on, at least in part, values determined during said first execution.

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