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Dedicated interface architecture for a hybrid integrated circuit

  • US 8,990,757 B2
  • Filed: 05/02/2008
  • Issued: 03/24/2015
  • Est. Priority Date: 04/28/1998
  • Status: Expired due to Fees
First Claim
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1. An integrated circuit comprising:

  • an FPGA circuit block including programmable logic circuit blocks and programmable FPGA interconnect conductors;

    dedicated interface interconnect conductors;

    an ASIC circuit block including hardwired circuits and ASIC interconnect conductors;

    interface buffers, each interface buffer including a multiplexer having data inputs coupled to ones of the dedicated interface interconnect conductors in the FPGA circuit block and an output, an input buffer having an input coupled to the output of the multiplexer and an output, an output buffer having an input coupled to the output of the input buffer and an output coupled to ones of the FPGA interconnect conductors in the FPGA circuit block; and

    I/O modules connected to the FPGA circuit block via interconnect conductors.

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  • 8 Assignments
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