X-Y address type solid state image pickup device and method of producing the same

• US 8,994,083 B2
• Filed: 07/03/2012
• Issued: 03/31/2015
• Est. Priority Date: 07/11/2001
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Suzuki, Ryoji, Mabuchi, Keiji, Mori, Tomonori
• Primary Examiner(s): Rizkallah, Kimberly
• Assistant Examiner(s): Belousov, Alexander
• Application Number:
  US13/541,447
• Publication Number:
  US 20120273912A1
• Time in Patent Office: 1,001 Days
• Field of Search: 257/294, 257/184, 257/187, 257/292, 257/444, 257/E31.058
• US Class Current: 257/292
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14621 Colour filter arrangements
• CPC Class Codes: H01L 27/14623 Optical shielding
• CPC Class Codes: H01L 27/14627 Microlenses
• CPC Class Codes: H01L 27/14632 Wafer-level processed structures
• CPC Class Codes: H01L 27/1464 Back illuminated imager structures
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 27/14685 Process for coatings or optical elements
• CPC Class Codes: H01L 27/14687 Wafer level processing
• CPC Class Codes: H01L 27/14689 MOS based technologies
• CPC Class Codes: H01L 31/02164 for shielding light, e.g. light blocking layers, cold shields for infrared detectors
• CPC Class Codes: H01L 31/0232 Optical elements or arrangements associated with the device H01L31/0236 takes precedence; for photovoltaic cells H01L31/054; for photovoltaic modules H02S40/20
• CPC Class Codes: H01L 31/02327 the optical elements being integrated or being directly associated to the device, e.g. back reflectors optical coatings H01L31/0216
• CPC Class Codes: H04N 25/79 Arrangements of circuitry being divided between different or multiple substrates, chips or circuit boards, e.g. stacked image sensors

Abstract

In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein. and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Claims

1. An imaging device comprising:

a semiconductor layer, a first surface of the semiconductor layer being opposite to a second surface of the semiconductor layer;

wirings in an insulator layer, said insulator layer touching said first surface;

a back side layer of a first conductivity type at said second surface, said back side layer being between a photo-electric conversion region of a second conductivity type and a micro-lens;

a photo-diode layer of the first conductivity type at said first surface, an accumulating region of the second conductivity type being between said photo-electric conversion region and said photo-diode layer;

a channel region of the first conductivity type between a floating diffusion of the second conductivity type and said photo-diode layer, said accumulating region and said floating diffusion touching said channel region;

a well region of the first conductivity type extending from said back side layer to said insulator layer, said photo-electric conversion region touching said back side layer and said well region,

wherein said well region is between said micro-lens and a first layer of the wirings, said first layer of the wirings being between said photo-electric conversion region and a second layer of the wirings.

2. The device of claim 1, wherein said first conductivity type is P-type.

3. The device of claim 1, wherein said first conductivity type is opposite to said second conductivity type.

4. The device of claim 1, wherein said wirings are metallic.

5. The device of claim 1, wherein said semiconductor layer is a silicon layer.

6. The device of claim 1, further comprising:

an opening through a light-shielding film, a portion of the back side layer being between said photo-electric conversion region and said opening.

7. The device of claim 6, wherein said opening is between said micro-lens and said portion of the back side layer.

8. The device of claim 6, wherein said light-shielding film is a metallic layer.

9. The device of claim 6, further comprising:

an insulating film between said light-shielding film and said back side layer, said insulating film touching said light-shielding film and said back side layer.

10. The device of claim 1, further comprising:

a peripheral circuit region of the second conductivity type touching said first surface and said back side layer, said well region being between said photo-electric conversion region and said peripheral circuit region.

11. The device of claim 10, wherein said peripheral circuit region touches said well region.

12. The device of claim 10, wherein said peripheral circuit region touches said second surface.

13. The device of claim 10, further comprising:

a first well of the first conductivity type extending into said peripheral circuit region from said first surface.

14. The device of claim 13, further comprising:

a second well of the second conductivity type extending into said first well from said first surface.

15. The device of claim 1, further comprising:

a different well region of the first conductivity type extending from said back side layer to said insulator layer, said photo-electric conversion region touching said different well region.

16. The device of claim 15, wherein said photo-electric conversion region is between said well region and said different well region, said photo-electric conversion region touching said well region and said different well region.

17. The device of claim 1, wherein said photo-electric conversion region extends from said back side layer to said insulator layer.

18. The device of claim 1, wherein said accumulating region of the second conductivity type touches said photo-electric conversion region and said photo-diode layer.

19. The device of claim 1, wherein an interface between said photo-electric conversion region and said back side layer is greater than an interface between said photo-electric conversion region and said accumulating region.

20. The device of claim 1, wherein a gate insulator is between said channel region and a gate electrode, said gate electrode being one of the wirings in said first layer of the wirings.

21. The device of claim 1, further comprising:

a substrate support member touching said insulator layer, said insulator layer being between said first surface of the semiconductor layer and said substrate support member.

22. The device of claim 1, further comprising:

a color filter between said micro-lens and said photo-electric conversion region, light being transmissible through said micro-lens and said color filter.

23. The device of claim 1, further comprising:

a substrate support member touching said insulator layer, said insulator layer being between said first surface of the semiconductor layer and said substrate support member.

24. The device of claim 1, wherein said photo-electric conversion region is configured to convert a spectrum of the light into said signal charge, a signal charge being transferable from said photo-electric conversion region to said floating diffusion.