Semiconductor integrated circuit device
First Claim
1. A semiconductor integrated circuit device comprising:
- a first flip-flop circuit configured to receive data in synchronization with a first clock signal;
a logic circuit configured to perform a predetermined process on data output from the first flip-flop circuit;
a hold buffer circuit configured to delay transmission of an output of the logic circuit;
a second flip-flop circuit configured to receive an output of the hold buffer circuit in synchronization with a second clock signal; and
a power supply circuit configured to select a supply of a power supply voltage to the first flip-flop circuit, the logic circuit, and the second flip-flop circuit between a first power supply voltage and a second power supply voltage higher than the first power supply voltage,wherein a power supply voltage supplied to the hold buffer circuit remains the same even when the power supply voltage supplied to the first flip-flop circuit, the logic circuit, and the second flip-flop circuit changes between the first and second power supply voltages.
1 Assignment
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Accused Products
Abstract
A semiconductor integrated circuit device includes a first flip-flop circuit receiving data in synchronization with a first clock signal, a logic circuit performing a predetermined process on data output from the first flip-flop circuit, a hold buffer delaying transmission of an output of the logic circuit, a second flip-flop circuit receiving an output of the hold buffer in synchronization with a second clock signal, and a power supply circuit capable of selecting a supply of a power supply voltage to the first flip-flop circuit, the logic circuit, and the second flip-flop circuit between a first power supply voltage and a second power supply voltage higher than the first power supply voltage. A power supply voltage supplied to the hold buffer remains the same when the power supply voltage supplied to the first flip-flop circuit, the logic circuit, and the second flip-flop circuit changes between first and second power supply voltages.
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Citations
20 Claims
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1. A semiconductor integrated circuit device comprising:
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a first flip-flop circuit configured to receive data in synchronization with a first clock signal; a logic circuit configured to perform a predetermined process on data output from the first flip-flop circuit; a hold buffer circuit configured to delay transmission of an output of the logic circuit; a second flip-flop circuit configured to receive an output of the hold buffer circuit in synchronization with a second clock signal; and a power supply circuit configured to select a supply of a power supply voltage to the first flip-flop circuit, the logic circuit, and the second flip-flop circuit between a first power supply voltage and a second power supply voltage higher than the first power supply voltage, wherein a power supply voltage supplied to the hold buffer circuit remains the same even when the power supply voltage supplied to the first flip-flop circuit, the logic circuit, and the second flip-flop circuit changes between the first and second power supply voltages. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A semiconductor integrated circuit device comprising:
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a first flip-flop circuit configured to receive data in synchronization with a first clock signal; a logic circuit configured to perform a predetermined process on data output from the first flip-flop circuit; a hold buffer circuit configured to delay transmission of an output of the logic circuit; a second flip-flop circuit configured to receive an output of the hold buffer circuit in synchronization with a second clock signal; a power supply circuit configured to select a supply of a power supply voltage to the first flip-flop circuit, the logic circuit, and the second flip-flop circuit between a first power supply voltage and a second power supply voltage higher than the first power supply voltage; a first power supply line that connects an output of the power supply circuit to power supply inputs of the first flip-flop circuit, the logic circuit, and the second flip-flop circuit; and a second power supply line that supplies one of the first and second power supply voltages to an input of the hold buffer circuit. - View Dependent Claims (9, 10, 11, 12, 13)
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14. A method of processing data through serially connected circuit elements of a semiconductor integrated circuit device that include a first flip-flop circuit, a logic circuit, a hold buffer circuit, and a second flip-flop circuit, said method comprising:
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receiving data in the first flip-flop circuit in synchronization with a first clock signal; performing a predetermined process on data output from the first flip-flop circuit with the logic circuit; delaying transmission of an output of the logic circuit with the hold buffer circuit; receiving an output of the hold buffer circuit in a second flip-flop circuit in synchronization with the second clock signal; and selecting a supply of a power supply voltage to the first flip-flop circuit, the logic circuit, and the second flip-flop circuit between a first power supply voltage and a second power supply voltage higher than the first power supply voltage, wherein a power supply voltage supplied to the hold buffer circuit remains the same even when the power supply voltage supplied to the first flip-flop circuit, the logic circuit, and the second flip-flop circuit changes between the first and second power supply voltages. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification