Electronic device and electronic apparatus

• US 8,994,711 B2
• Filed: 11/29/2010
• Issued: 03/31/2015
• Est. Priority Date: 04/27/1999
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamauchi, Yukio, Fukunaga, Takeshi
• Primary Examiner(s): ABDIN, SHAHEDA A
• Application Number:
  US12/955,036
• Publication Number:
  US 20110090209A1
• Time in Patent Office: 1,583 Days
• Field of Search: 345 76- 83, 313/463, 315/169.13, 438/23, 257/59, 257/72, 257/350, 257/E27.014
• US Class Current: 345/211
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 27/13 combined with thin-film or thick-film passive components
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78627 with a significant overlap between the lightly doped drain and the gate electrode, e.g. GOLDD
• CPC Class Codes: H10K 2102/3026 Top emission
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/1216 the pixel elements being capacitors
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 59/38 comprising colour filters or colour changing media [CCM]

Abstract

An EL display having high operating performance and reliability is provided. LDD regions 15a through 15d of a switching TFT 201 formed in a pixel are formed such that they do not overlap gate electrodes 19a and 19b to provide a structure which is primarily intended for the reduction of an off-current. An LDD region 22 of a current control TFT 202 is formed such that it partially overlaps a gate electrode 35 to provide a structure which is primarily intended for the prevention of hot carrier injection and the reduction of an off-current. Appropriate TFT structures are thus provided depending on required functions to improve operational performance and reliability.

Claims

1. A display device comprising:

a pixel comprising;

a first transistor comprising a first region of a semiconductor layer, a gate insulating film, and a gate electrode;

a second transistor electrically connected to the first transistor;

a storage capacitor comprising a second region of the semiconductor layer, the gate insulating film, and a capacitor forming electrode; and

an EL element electrically connected to the second transistor;

an insulating film over the first transistor, the second transistor, and the storage capacitor;

a current supply line electrically connected to the capacitor forming electrode through a contact hole in the insulating film, and one of a source region and a drain region of the second transistor; and

a gate line intersecting with the current supply line,

wherein the EL element is formed over the insulating film,

wherein the capacitor forming electrode and the gate electrode of the first transistor are over and in contact with the gate insulating film of the first transistor,

wherein the capacitor forming electrode forms in parallel to the gate line while overlapping the second region of the semiconductor layer,

wherein the gate electrode of the first transistor is double gate structure, and

wherein the capacitor forming electrode and the double gate electrode of the first transistor are formed from a conductive film.

2. The display device according to claim 1, wherein the first transistor has an LDD region which does not overlap with the gate electrode of the first transistor.

3. The display device according to claim 1, wherein the second transistor has an LDD region which partially overlaps with a gate electrode of the second transistor.

4. The display device according to claim 1, wherein the first transistor has an LDD region which partially overlaps with the gate electrode of the first transistor.

5. The display device according to claim 1, wherein a gate electrode of the second transistor is electrically connected to one of a source region and a drain region of the first transistor.

6. The display device according to claim 1, wherein a portion of the current supply line is over the capacitor forming electrode.

7. A display device comprising:

a pixel comprising;

a first transistor comprising a first region of a semiconductor layer, a gate insulating film, and a gate electrode;

a second transistor electrically connected to the first transistor;

a storage capacitor comprising a second region of the semiconductor layer, the gate insulating film, and a capacitor forming electrode;

a color filter; and

an EL element overlapped with the color filter and electrically connected to the second transistor;

an insulating film over the first transistor, the second transistor, and the storage capacitor;

a current supply line electrically connected to the capacitor forming electrode through a contact hole in the insulating film, and one of a source region and a drain region of the second transistor; and

a gate line intersecting with the current supply line,

wherein the EL element is formed over the insulating film,

wherein the capacitor forming electrode and the gate electrode of the first transistor are over and in contact with the gate insulating film of the first transistor,

wherein the capacitor forming electrode forms in parallel to the gate line while overlapping the second region of the semiconductor layer,

wherein the gate electrode of the first transistor is double gate structure, and

wherein the capacitor forming electrode and the double gate electrode of the first transistor are formed from a conductive film.

8. The display device according to claim 7, wherein the first transistor has an LDD region which does not overlap with the gate electrode of the first transistor.

9. The display device according to claim 7, wherein the second transistor has an LDD region which partially overlaps with a gate electrode of the second transistor.

10. The display device according to claim 7, wherein the first transistor has an LDD region which partially overlaps with the gate electrode of the first transistor.

11. The display device according to claim 7, wherein a gate electrode of the second transistor is electrically connected to one of a source region and a drain region of the first transistor.

12. The display device according to claim 7, wherein a portion of the current supply line is over the capacitor forming electrode.