Method for driving display device in which analog signal and digital signal are supplied to source driver

• US 8,994,756 B2
• Filed: 05/01/2006
• Issued: 03/31/2015
• Est. Priority Date: 05/02/2005
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kimura, Hajime, Yamazaki, Shunpei
• Primary Examiner(s): MARINELLI, PATRICK
• Application Number:
  US11/381,073
• Publication Number:
  US 20080084403A1
• Time in Patent Office: 3,256 Days
• Field of Search: 345 76- 83, 345 84-104, 345204-215, 345690-699, 3151691-1694
• US Class Current: 345/690
• CPC Class Codes: G09G 2300/0439 Pixel structures
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 3/2011 by amplitude modulation
• CPC Class Codes: G09G 3/3241 the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
• CPC Class Codes: G09G 3/325 the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
• CPC Class Codes: G09G 3/3291 in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

Abstract

A display method and device obtains advantages of both an analog gray scale method and a digital gray scale method by performing display in multiple display modes. In a display mode-specific video signal generation circuit, an input video signal is output, as an analog value without any change, as a binary digital value, and as a multi-valued digital value. As a result, the display mode changes in a timely manner. Accordingly, a clear image can be displayed. In other words, an analog signal and a digital signal are switched and input to a source driver. In addition, the display device also switches and outputs an analog signal and a digital signal such that the display device can have the advantages of both the analog gray scale method and the digital gray scale method.

Claims

1. A display device comprising:

a display region comprising a first region including a first pixel array, a second region including a second pixel array and a third region including a third pixel array, wherein the first region, the second region and the third region are configured to perform a display at the same time, wherein the first region excludes the second region and the third region and is smaller than the second region, wherein the third region excludes the second region and is smaller than the second region, and wherein the second region is between the first region and the third region;

a source driver and a gate driver each electrically connected to the first region, the second region and the third region, and

a circuit from which an analog signal and a digital signal supplied to the source driver are output,

wherein the source driver is configured to drive the first pixel array exclusive of the second pixel array and the third pixel array in a digital display mode using a video signal consisting of a binary value,

wherein the source driver is configured to drive the second pixel array exclusive of the first pixel array and the third pixel array in an analog display mode using a video signal consisting of the analog signal,

wherein the source driver is configured to drive the third pixel array exclusive of the first pixel array and the second pixel array in a multi-valued display mode using a video signal consisting of a multi-valued digital signal which is different from the video signal consisting of the binary value and the video signal consisting of the analog signal,

wherein the driving of the first pixel array in the digital display mode, the driving of the second pixel array in the analog display mode, and the driving of the third pixel array in the multi-valued display mode by the source driver occurs at the same time to perform the display,

wherein the first pixel array of the first region comprises first pixels, each including a first TFT and a first display element,

wherein the second pixel array of the second region comprises second pixels, each including a second TFT, a capacitor element, and a second display element, and

wherein the capacitor element comprises a semiconductor layer, an insulating layer, and a conductive layer.

2. The display device according to claim 1,

wherein the circuit includes a binarization circuit, and

wherein the analog signal is input to the circuit, and the analog signal is converted into the digital signal using the binarization circuit.

3. The display device according to claim 1,

wherein the circuit includes a DA converter circuit, and

wherein the digital signal is input to the circuit, and the digital signal is converted into the analog signal using the DA converter circuit.

4. The display device according to claim 1, wherein each of the first display element and the second display element is a light emitting element.

5. The display device according to claim 1, wherein the first region is a peripheral region of the display region and the second region is a center region of the display region.

6. The display device according to claim 1, wherein the driving of the first pixel array exclusive of the second pixel array in the digital display mode includes a digital gray scale method, and the driving of the second pixel array exclusive of the first pixel array in the analog display mode includes an analog gray scale method.

7. A display device comprising:

a display region comprising a first region including a first pixel array, a second region including a second pixel array and a third region including a third pixel array, wherein the first region, the second region and the third region are configured to perform a display at the same time, wherein the first region excludes the second region and the third region and is smaller than the second region, wherein the third region excludes the second region and is smaller than the second region, and wherein the second region is between the first region and the third region; and

a source driver and a gate driver each electrically connected to the first region and the second region,

wherein the source driver is configured to drive the first pixel array exclusive of the second pixel array and the third pixel array in a digital display mode using a video signal consisting of a binary value,

wherein the source driver is configured to drive the second pixel array exclusive of the first pixel array and the third pixel array in an analog display mode using a video signal consisting of an analog signal,

wherein the source driver is configured to drive the third pixel array exclusive of the first pixel array and the second pixel array in a multi-valued display mode using a video signal consisting of a multi-valued digital signal which is different from the video signal consisting of the binary value and the video signal consisting of the analog signal,

wherein the driving of the first pixel array in the digital display mode, the driving of the second pixel array in the analog display mode, and the driving of the third pixel array in the multi-valued display mode by the source driver occurs at the same time to perform the display,

wherein the first pixel array displays characters,

wherein the second pixel array displays images,

wherein the first pixel array of the first region comprises first pixels, each including a first TFT and a first display element,

wherein the second pixel array of the second region comprises second pixels, each including a second TFT, a capacitor element, and a second display element, and

wherein the capacitor element comprises a semiconductor layer, an insulating layer and a conductive layer.

8. The display device according to claim 7, wherein each of the first display element and the second display element is a light emitting element.

9. The display device according to claim 7, wherein the first region is a peripheral region of the display region and the second region is a center region of the display region.

10. The display device according to claim 7, wherein the driving of the first pixel array exclusive of the second pixel array in the digital display mode includes a digital gray scale method, and the driving of the second pixel array exclusive of the first pixel array in the analog display mode includes an analog gray scale method.

11. A display device comprising:

a display region comprising a first region including a first pixel array, a second region including a second pixel array and a third region including a third pixel array, wherein the first region, the second region and the third region are configured to perform a display at the same time, wherein the first region excludes the second region and the third region and is located along one side of the display region, wherein the third region excludes the second region and is smaller than the second region, and wherein the second region is between the first region and the third region;

a source driver and a gate driver each electrically connected to the first region, the second region and the third region, and

a circuit from which an analog signal and a digital signal supplied to the source driver are output,

wherein the source driver is configured to drive the first pixel array exclusive of the second pixel array and the third pixel array in a digital display mode using a video signal consisting of a binary value,

wherein the source driver is configured to drive the second pixel array exclusive of the first pixel array and the third pixel array in an analog display mode using a video signal consisting of the analog signal,

wherein the source driver is configured to drive the third pixel array exclusive of the first pixel array and the second pixel array in a multi-valued display mode using a video signal consisting of a multi-valued digital signal which is different from the video signal consisting of the binary value and the video signal consisting of the analog signal,

wherein the driving of the first pixel array in the digital display mode, the driving of the second pixel array in the analog display mode, and the driving of the third pixel array in the multi-valued display mode by the source driver occurs at the same time to perform the display,

wherein the first pixel array of the first region comprises first pixels, each including a first TFT and a first display element,

wherein the second pixel array of the second region comprises second pixels, each including a second TFT, a capacitor element, and a second display element, and

wherein the capacitor element comprises a semiconductor layer, an insulating layer, and a conductive layer.

12. The display device according to claim 11,

wherein the circuit includes a binarization circuit, and

wherein the analog signal is input to the circuit, and the analog signal is converted into the digital signal using the binarization circuit.

13. The display device according to claim 11,

wherein the circuit includes a DA converter circuit, and

wherein the digital signal is input to the circuit, and the digital signal is converted into the analog signal using the DA converter circuit.

14. The display device according to claim 11, wherein each of the first display element and the second display element is a light emitting element.

15. The display device according to claim 11, wherein the driving of the first pixel array exclusive of the second pixel array in the digital display mode includes a digital gray scale method, and the driving of the second pixel array exclusive of the first pixel array in the analog display mode includes an analog gray scale method.