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System and methods for dynamic erase and program control for flash memory device memories

  • US 8,995,197 B1
  • Filed: 08/27/2012
  • Issued: 03/31/2015
  • Est. Priority Date: 08/26/2009
  • Status: Active Grant
First Claim
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1. A non-transitory computer readable medium for flash memory device parameter optimization, the non-transitory computer readable medium stores instructions for:

  • receiving or generating an estimate of a wear level of at least one group of flash memory cells of the flash memory device;

    finding erase parameters and programming parameters to be applied on one or more groups of flash memory cells of the flash memory device in response to estimate the wear level;

    wherein the finding comprises evaluating a plurality of sets of evaluated parameters that differ from each other by a value of at least one parameter, wherein each one of the plurality of sets of evaluated parameters comprise at least one out of a set of erase parameters and a set of programming parameters;

    wherein the non-transitory computer readable medium further stores instructions for executing at least one out of;

    (a) ignoring sets of erase parameters that once applied result in an average duration of erase operations that exceeds an erase duration threshold,(b) ignoring sets of programming parameters that once applied result in an average duration of programming operations that exceeds a programming duration threshold,(c) selecting a set of evaluated parameters that once applied results in a higher bit error rate at low wear levels and a lower increment rate of bit error rates per wear level in relation to at least one other set of evaluated parameters,(d) selecting a set of evaluated parameters that once applied results in (i) a higher bit error rate and a lower programming duration at low wear levels and (ii) a lower increment rate of bit error rates per wear level in relation to at least one other set of evaluated parameters, and(e) selecting a set of evaluated parameters that once applied results in a higher bit error rate at low wear levels and at a lower increment rate of bit error rates per wear level in relation to a reference set of parameters that is expected to be applied regardless of a wear level of the at least one group of flash memory cells.

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