Pulse signal output circuit and shift register

• US 8,995,607 B2
• Filed: 05/28/2013
• Issued: 03/31/2015
• Est. Priority Date: 05/31/2012
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Miyake, Hiroyuki, Okazaki, Kenichi, Miyamoto, Toshiyuki, Nomura, Masafumi, Yamazaki, Shunpei, Hamochi, Takashi
• Primary Examiner(s): Lam, Tuan T
• Application Number:
  US13/903,193
• Publication Number:
  US 20130322592A1
• Time in Patent Office: 672 Days
• Field of Search: None
• US Class Current: 377/64
• CPC Class Codes: G11C 19/184 with field-effect transistors, e.g. MOS-FET
• CPC Class Codes: G11C 19/28 using semiconductor elements G11C19/14, G11C19/36 take precedence
• CPC Class Codes: H03K 3/353 by the use, as active elements, of field-effect transistors with internal or external positive feedback H03K3/023, H03K3/027 take precedence

Abstract

To provide a pulse signal output circuit and a shift register which have lower power consumption, are not easily changed over time, and have a longer lifetime. A pulse signal output circuit includes a first input signal generation circuit; a second input signal generation circuit; an output circuit which includes a first transistor and a second transistor and outputs a pulse signal in response to a signal output from the first and second input signal generation circuits; a monitor circuit which obtains the threshold voltages of the first and second transistors; and a power supply output circuit which generates a power supply potential raised by a potential higher than or equal to a potential which is equal to or substantially equal to the threshold voltage and supplies the power supply potential to the first and second input signal generation circuits. A shift register includes the pulse signal output circuit.

Claims

1. A pulse signal output circuit comprising:

a first input signal generation circuit;

a second input signal generation circuit;

an output circuit including a first transistor and a second transistor, the output circuit outputting a pulse signal in response to a signal output from the first input signal generation circuit and the second input signal generation circuit;

a reference circuit which obtains the first threshold voltage of the first transistor and the second threshold voltage of the second transistor; and

a power supply output circuit which generates a power supply potential raised by a potential higher than or equal to a potential which is equal to or substantially equal to the first threshold voltage or the second threshold voltage and supplies the power supply potential to the first input signal generation circuit and the second input signal generation circuit.

2. The pulse signal output circuit according to claim 1,

wherein a first threshold voltage of the first transistor is shifted in the positive direction and a second threshold voltage of the second transistor is shifted in the positive direction by a positive BT stress under the following conditions:

the substrate temperature is 80°

C., the intensity of an electric field applied to the gate insulating film is 1.28 MV/cm, and the application time is 2000 seconds.

3. The pulse signal output circuit according to claim 1,

wherein the first transistor and the second transistor have the same polarity.

4. The pulse signal output circuit according to claim 1,

wherein the reference circuit comprises a third transistor and a fourth transistor.

5. The pulse signal output circuit according to claim 1,

wherein the reference circuit comprises:

a counter detecting driving time of each of the first transistor and the second transistor, and

a memory storing reference data for obtaining the first threshold voltage and the second threshold voltage.

6. A shift register comprising the pulse signal output circuit according to claim 1.

7. A pulse signal output circuit comprising:

first to fourth transistors;

a first input signal generation circuit;

a second input signal generation circuit;

a reference circuit configured to obtain a first threshold voltage of the third transistor and a second threshold voltage of the fourth transistor; and

a power supply output circuit configured to generate a high-potential-side power supply potential and a low-potential-side power supply potential based on an output of the reference circuit, and supply the high-potential-side power supply potential and the low-potential-side power supply potential to the first input signal generation circuit and the second input signal generation circuit,

wherein a first terminal of the first transistor and a first terminal of the second transistor are electrically connected to each other and function as a first output terminal,

wherein a first terminal of the third transistor and a first terminal of the fourth transistor are electrically connected to each other and function as a second output terminal,

wherein a gate terminal of the first transistor, a gate terminal of the third transistor, and an output terminal of the first input signal generation circuit are electrically connected to one another, and

wherein a gate terminal of the second transistor, a gate terminal of the fourth transistor, and an output terminal of the second input signal generation circuit are electrically connected to one another.

8. The pulse signal output circuit according to claim 7,

wherein a load connected to the second output terminal is heavier than a load connected to the first output terminal.

9. The pulse signal output circuit according to claim 7,

wherein an output signal of the second input signal generation circuit is input to the first input signal generation circuit.

10. The pulse signal output circuit according to claim 7,

wherein the third transistor and the fourth transistor have the same polarity.

11. The pulse signal output circuit according to claim 7,

wherein the reference circuit comprises a fifth transistor and a sixth transistor.

12. The pulse signal output circuit according to claim 7,

wherein the reference circuit comprises:

a counter detecting driving time of each of the third transistor and the fourth transistor, and

a memory storing reference data for obtaining the first threshold voltage and the second threshold voltage.

13. A shift register comprising the pulse signal output circuit according to claim 7.

14. A pulse signal output circuit comprising:

an output circuit including a first transistor, a second transistor, a third transistor, and a fourth transistor;

a reference circuit configured to obtain a first threshold voltage of the third transistor and a second threshold voltage of the fourth transistor; and

a power supply output circuit configured to generate a high-potential-side power supply potential and a low-potential-side power supply potential based on an output of the reference circuit,

wherein a first terminal of the first transistor and a first terminal of the second transistor are electrically connected to each other and function as a first output terminal,

wherein a first terminal of the third transistor and a first terminal of the fourth transistor are electrically connected to each other and function as a second output terminal,

wherein a gate terminal of the first transistor and a gate terminal of the third transistor are electrically connected to one another, and

wherein a gate terminal of the second transistor and a gate terminal of the fourth transistor are electrically connected to one another.

15. The pulse signal output circuit according to claim 14,

wherein a load connected to the second output terminal is heavier than a load connected to the first output terminal.

16. The pulse signal output circuit according to claim 14,

wherein the third transistor and the fourth transistor have the same polarity.

17. The pulse signal output circuit according to claim 14,

wherein the reference circuit comprises a fifth transistor and a sixth transistor.

18. The pulse signal output circuit according to claim 14,

wherein the reference circuit comprises:

a counter detecting driving time of each of the third transistor and the fourth transistor, and

a memory storing reference data for obtaining the first threshold voltage and the second threshold voltage.

19. A shift register comprising the pulse signal output circuit according to claim 14.