Transmission line for an integrated circuit package

• US 8,995,912 B2
• Filed: 12/21/2012
• Issued: 03/31/2015
• Est. Priority Date: 12/03/2012
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Rofougaran, Ahmadreza
• Primary Examiner(s): Nguyen, Duc M
• Application Number:
  US13/725,051
• Publication Number:
  US 20140152384A1
• Time in Patent Office: 830 Days
• Field of Search: 455/41.1, 455/41.2, 455/349, 333/109, 333/115, 333/116, 333/124, 333/156, 333/260
• US Class Current: 455/41.1
• CPC Class Codes: H01L 2223/6611 Wire connections
• CPC Class Codes: H01L 2223/6688 Mixed frequency adaptations, i.e. for operation at different frequencies
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 25/00 Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereofdevices consisting of a plurality of solid state components formed in or on a common substrate H01L27/00; photovoltaic modules or arrays of photovoltaic cells H01L31/042 ; panels or arrays of photo electrochemical cells H01G9/2068
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01P 1/18 Phase-shifters H01P1/165 takes precedence
• CPC Class Codes: H01P 5/04 with variable factor of coupling
• CPC Class Codes: H01Q 13/06 Waveguide mouths horns H01Q13/02
• CPC Class Codes: H01Q 13/206 Microstrip transmission line antennas
• CPC Class Codes: H04B 5/72 for local intradevice communication

Abstract

Communication between chips is provided using a transmission line. Any one of the chips may tap into the transmission line, and communicate with another chip tapped into the transmission line by transmitting a radio frequency (RF) signal to the other chip via the transmission line or receiving an RF signal from the other chip via the transmission line. The transmission line may include a microstrip transmission line, a waveguide, a stripline transmission line, or another type of transmission line. The chips may use the transmission line to communicate data, control and/or clock signals with one another.

Claims

1. An integrated chip (IC) package, comprising:

a transmission line;

a first chip including a first radio frequency (RF) transceiver coupled to the transmission line at a first position; and

a second chip including a second RF transceiver coupled to the transmission line at a second position;

wherein the first and second RF transceivers are configured to communicate with one another by transmitting and receiving RF signals on the transmission line; and

wherein the first RF transceiver is configured to transmit a first RF signal having a first frequency to the second RF transceiver, and the first and second positions are spaced apart on the transmission line such that a standing wave is generated between the first and second positions when the first RF transceiver transmits the first RF signal, the standing wave forming an approximate short at the first position and an approximate open at the second position.

2. The IC package of claim 1, wherein the transmission line comprises:

a conductor;

a ground plane; and

a dielectric layer between the conductor and the ground plane.

3. The IC package of claim 2, wherein the conductor is substantially flat and runs substantially parallel to the ground plane.

4. The IC package of claim 2, wherein the transmission line is integrated on a substrate, and the first chip and the second chip are mounted on the substrate.

5. The IC package of claim 1, wherein the first chip comprises a controller, the first RF transceiver comprises a power amplifier having an adjustable output power, and the controller is configured to adjust the output power of the power amplifier based on at least one of a data rate of an RF signal to be transmitted to the second RF transceiver via the transmission line and an error rate at the second RF transceiver.

6. The IC package of claim 1, wherein the first chip comprises a controller, the first RF transceiver comprises a modulator having an adjustable modulation scheme, and the controller is configured to adjust the modulation scheme of the modulator based on at least one of a data rate of an RF signal to be transmitted to the second RF transceiver via the transmission line, and an error rate at the second RF transceiver.

7. An integrated chip (IC) package, comprising:

a transmission line;

a first chip including a first radio frequency (RF) transceiver coupled to the transmission line at a first position;

a second chip including a second RF transceiver coupled to the transmission line at a second position; and

a third chip including a third RF transceiver coupled to the transmission line;

wherein the first, second and third RF transceivers are configured to communicate with one another by transmitting and receiving RF signals on the transmission line; and

wherein the first RF transceiver is configured to transmit a first RF signal having a first frequency to the second RF transceiver, and the first and second positions are spaced apart on the transmission line such that a standing wave is generated between the first and second positions when the first RF transceiver transmits the first RF signal, the standing wave forming an approximate short at the first position and an approximate open at the second position.

8. The IC package of claim 7, wherein the first RF transceiver is configured to transmit the first RF signal having the first frequency to the second RF transceiver via the transmission line, and to transmit the second RF signal having a second frequency to the third RF transceiver via the transmission line.

9. The IC package of claim 7, wherein the first RF transceiver is configured to transmit, during a first time slot, the first RF signal to the second RF transceiver via the transmission line, and to transmit, during a second time slot, a second RF signal to the third RF transceiver via the transmission line.

10. The IC package of claim 7, wherein the first RF transceiver is configured to spread the first RF signal with a first code assigned to the second chip, to spread a second RF signal with a second code assigned to the third chip, and to transmit the first and second RF signals on the transmission line.

11. The IC package of claim 7, wherein the first RF transceiver is configured to transmit the first RF signal and a second RF signal on the transmission line, the first RF signal including a first address assigned to the second chip and the second RF signal including a second address assigned to the third chip.

12. The IC package of claim 7, wherein the transmission line comprises:

a conductor;

a ground plane; and

a dielectric layer between the conductor and the ground plane.

13. The IC package of claim 12, wherein the conductor is substantially flat and runs substantially parallel to the ground plane.

14. The IC package of claim 12, wherein the transmission line is integrated on a substrate, and the first, second and third chips are mounted on the substrate.

15. An integrated chip (IC) package, comprising:

a transmission line;

a first tap coupled to the transmission line at a first position on the transmission line;

a second tap coupled to the transmission line at a second position on the transmission line, the second position being spaced apart from the first position;

a first chip, wherein the chip comprises;

a first radio frequency (RF) transceiver;

a coupling switch configured to selectively couple the first RF transceiver to the first tap and the second tap; and

a controller configured to control the coupling switch; and

a second chip comprising a second RF transceiver coupled to the transmission line at a third position;

wherein the first RF transceiver is configured to transmit a first RF signal having a first frequency to the second RF transceiver, and the first and third positions are spaced apart on the transmission line such that a standing wave is generated between the first and third positions when the first RF transceiver transmits the first RF signal, the standing wave forming an approximate short at the first position and an approximate open at the third position.

16. The IC package of claim 15, wherein the controller is configured to instruct the coupling switch to couple the RF transceiver to the first tap when the RF transceiver is to transmit the first RF signal having the first frequency on the transmission line, and to instruct the coupling switch to couple the RF transceiver to the second tap when the RF transceiver is to transmit a second RF signal having a second frequency on the transmission line.

17. The IC package of claim 15, wherein the transmission line comprises:

a conductor;

a ground plane; and

a dielectric layer between the conductor and the ground plane.

18. The IC package of claim 17, wherein the conductor is substantially flat and runs substantially parallel to the ground plane.

19. The IC package of claim 17, wherein the first tap comprises a first interconnect bump between the first chip and the conductor of the transmission line, and the second tap comprises a second interconnect bump between the first chip and the conductor of the transmission line.

20. The IC package of claim 17, wherein the transmission line is integrated on a substrate, and the first chip and the second chip are mounted on the substrate.