Conductive vias in a substrate

• US 8,999,179 B2
• Filed: 08/04/2011
• Issued: 04/07/2015
• Est. Priority Date: 07/13/2010
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Yu, Chen-Hua, Yeh, Der-Chyang
• Primary Examiner(s): Tran, Binh X
• Assistant Examiner(s): CATHEY JR, DAVID A
• Application Number:
  US13/198,354
• Publication Number:
  US 20130034816A1
• Time in Patent Office: 1,342 Days
• Field of Search: None
• US Class Current: 216/18
• CPC Class Codes: G03F 7/20 Exposure; Apparatus therefor photographic printing apparatus for making copies G03B27/00
• CPC Class Codes: H01K 3/10 Machines therefor
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 23/15 Ceramic or glass substrates H01L23/142, H01L23/145, H01L23/147 take precedence
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base

Abstract

A method of forming a conductive via in a substrate includes forming a via hole covered by a dielectric layer followed by an annealing process. The dielectric layer can getter the mobile ions from the substrate. After removing the dielectric layer, a conductive material is formed in the via hole, forming a conductive via in the substrate.

Claims

1. A method comprising:

forming a via hole in a substrate, the via hole having a sidewall surface and a bottom surface, the substrate comprising a photosensitive layer, the via hole extending into the photosensitive layer of the substrate;

forming a dielectric layer on the substrate, the dielectric layer covering the sidewall surface and the bottom surface of the via hole in the substrate;

after the forming the dielectric layer, performing an annealing process on the dielectric layer;

completely removing the dielectric layer from the sidewall surface of the via hole; and

forming a conductive material in the via hole in the substrate.

2. The method of claim 1, wherein the substrate comprises a glass substrate.

3. The method of claim 2, wherein the glass substrate comprises a photo-sensitive glass material.

4. The method of claim 1, wherein the dielectric layer comprises a phosphosilicate glass (PSG) layer.

5. The method of claim 1, wherein the dielectric layer comprises a borophosphosilicate glass (BPSG) layer.

6. The method of claim 1, wherein before forming the dielectric layer on the substrate, the substrate comprises mobile ions.

7. The method of claim 6, wherein after performing the annealing process on the dielectric layer, at least one of the mobile ions in the substrate is removed.

8. The method of claim 6, wherein the mobile ions comprise sodium ions.

9. The method of claim 1, wherein the conductive material comprises copper.

10. The method of claim 1, wherein the via hole has a via depth to via diameter ratio greater than 10:

1.

11. The method of claim 1, wherein forming the via hole in the substrate comprises:

performing a light exposure on the substrate; and

performing a wet etching process to remove exposed portions of the substrate.

12. A method comprising:

forming a via hole in a substrate, wherein the substrate comprises mobile ions;

forming a dielectric layer on sidewalls and bottom surfaces of the via holes;

after the forming the dielectric layer, removing at least one of the mobile ions from the substrate; and

completely removing the dielectric layer from sidewalls and bottom surfaces of the via holes.

13. The method of claim 12, wherein the dielectric layer comprises a phosphosilicate glass (PSG) layer.

14. The method of claim 12, wherein the dielectric layer comprises a borophosphosilicate glass (BPSG) layer.

15. The method of claim 12, wherein the substrate comprises a photosensitive glass material.

16. The method of claim 12, wherein the mobile ions comprise alkaline ions.

17. The method of claim 12, wherein removing the mobile ions comprises performing an annealing process on the dielectric layer.

18. The method of claim 12, further comprising forming a conductive material in the via hole after removing the dielectric layer.

19. The method of claim 12, wherein the via hole has a via depth to via diameter ratio greater than 10:

1.

20. The method of claim 12, wherein forming the via hole in the substrate comprises:

performing a light exposure on the substrate; and

performing a wet etching process to remove exposed portions of the substrate.