Optoelectronic system

• US 8,999,736 B2
• Filed: 07/21/2010
• Issued: 04/07/2015
• Est. Priority Date: 07/04/2003
• Status: Expired due to Term

• Current Assignee: Epistar Corporation (Ennostar, Inc.)
• Original Assignee: Epistar Corporation (Ennostar, Inc.)
• Inventors: Hsieh, Min-Hsun, Han, Cheng-Nan, Hong, Steve Meng-Yuan, Liu, Hsin-Mao, Lee, Tsung-Xian
• Primary Examiner(s): Fahmy, Wael
• Assistant Examiner(s): SALERNO, SARAH KATE
• Application Number:
  US12/840,848
• Publication Number:
  US 20100283062A1
• Time in Patent Office: 1,721 Days
• Field of Search: 438/27, 438/28, 438/30, 438/26, 438/34, 438/42, 257/E21.54, 257/E21.545
• US Class Current: 438/27
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/24137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/4918 being disposed on at least two different sides of the body, e.g. dual array
• CPC Class Codes: H01L 2224/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/92 Specific sequence of method steps
• CPC Class Codes: H01L 2224/96 the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 24/96 the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 25/0756 : Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01007 : Nitrogen [N]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01031 : Gallium [Ga]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01094 : Plutonium [Pu]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/10349 : Aluminium gallium indium phosphide [AlGaInP]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/12043 : Photo diode
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 33/0093 : Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/385 : the electrode extending at least partially onto a side surface of the semiconductor body
• CPC Class Codes: H01L 33/405 : Reflective materials
• CPC Class Codes: H01L 33/486 : adapted for surface mounting
• CPC Class Codes: H01L 33/504 : Elements with two or more wavelength conversion materials
• CPC Class Codes: H01L 33/507 : the elements being in intimate contact with parts other than the semiconductor body or integrated with parts other than the semiconductor body
• CPC Class Codes: H01L 33/508 : having a non-uniform spatial arrangement or non-uniform concentration, e.g. patterned wavelength conversion layer, wavelength conversion layer with a concentration gradient of the wavelength conversion material
• CPC Class Codes: H01L 33/56 : Materials, e.g. epoxy or silicone resin

Abstract

A method of making an optoelectronic system in accordance with the present disclosure is disclosed. The method includes providing a temporary substrate; providing un-packaged optoelectronic elements having sidewalls, top surfaces, and bottom surfaces, at least one of the unpackaged optoelectronic elements having an electrode provided on a side of the bottom surfaces; attaching the bottom surfaces to the temporary substrate such that a trench is formed between two of the un-packaged optoelectronic elements; providing an adhesive material to fully fill the trench and cover the un-packaged optoelectronic elements such that the sidewalls and top surfaces of the un-packaged optoelectronic elements are fully enclosed by the adhesive material; providing a transparent substrate on the adhesive material; and removing the temporary substrate without removing all the adhesive material covering the optoelectronic elements.

Claims

1. A method of making an optoelectronic system comprising:

providing a temporary substrate;

providing un-packaged optoelectronic elements having sidewalls, top surfaces, and bottom surfaces, at least one of the unpackaged optoelectronic elements having an electrode provided on a side of the bottom surfaces;

attaching the bottom surfaces to the temporary substrate such that a trench is formed between two of the un-packaged optoelectronic elements;

providing an adhesive material to fully fill the trench and cover the un-packaged. optoelectronic elements such that the sidewalls and top surfaces of the un-packaged optoelectronic elements are fully enclosed by the adhesive material;

providing a transparent substrate on the adhesive material; and

removing the temporary substrate without removing all the adhesive material covering the optoelectronic elements.

2. The method of claim 1 further comprising:

providing a first connecting layer on the temporary substrate to connect the un-packaged optoelectronic elements.

3. The method of claim 1, wherein the un-packaged optoelectronic elements comprises a. light-emitting diode.

4. The method of claim 1 further comprising:

providing a phosphor layer on at least one of the top surfaces of the un-packaged optoelectronics elements.

5. The method of claim 1 further comprising:

providing a fan-out electrode on an electrode of one of the un-packaged optoelectronic elements, wherein the fan-out electrode is wider than the electrode.

6. The method of claim 1 further comprising:

providing a fan-out electrode electrically connected to at least one of the un-packaged optoelectronic elements and extending outside a boundary of the at least one of the un-packaged optoelectronic elements.

7. The method of claim 1 further comprising:

providing a second connecting layer between the transparent substrate and at least one of the un-packaged optoelectronic elements.

8. The method of claim 7, wherein the second connecting layer comprises a channel.

9. The method of claim 1 further comprising:

providing a micro-pyramid between two of the un-packaged optoelectronic elements.

10. The method of claim 1, wherein at least one of the top surfaces is devoid of a metal layer.

11. The method of claim 1, wherein the attaching step comprises preparing the un-packaged optoelectronic elements which have a growth substrate covered by the adhesive material.

12. The method of claim 1, wherein, in the step of attaching the bottom surface to the temporary substrate, the electrode is directly attached to the temporary substrate.

13. The method of claim 12, wherein the electrode has an elevation higher than the adhesive material.

14. The method of claim 1, further comprising electrically coupling the optoelectronic elements in series, in parallel, or both.

15. The method of claim 1, wherein the electrode is exposed after removing the temporary substrate.

16. The method of claim 1, wherein the adhesive material is attached to the side walls of the un-packaged optoelectronic elements after removing the temporary substrate.

17. The method of claim 1, further comprising a step of dividing the transparent substrate after removing the temporary substrate.

18. The method of claim 1, further comprising a step of providing a reflecting layer on the transparent substrate.

19. The method of claim 1 further comprising:

providing a phosphor powder mixed with the adhesive layer.