Semiconductor device manufacturing method

• US 8,999,841 B2
• Filed: 08/03/2012
• Issued: 04/07/2015
• Est. Priority Date: 08/05/2011
• Status: Active Grant

• Current Assignee: Tokyo Electron Limited
• Original Assignee: Tokyo Electron Limited
• Inventors: Ishizaka, Tadahiro, Gomi, Atsushi, Hatano, Tatsuo, Mizusawa, Yasushi, Suzuki, Kenzi
• Primary Examiner(s): Nguyen, Ha Tran T
• Assistant Examiner(s): MUSE, ISMAIL A
• Application Number:
  US13/566,515
• Publication Number:
  US 20130203250A1
• Time in Patent Office: 977 Days
• Field of Search: 257/301, 257/751, 257/774, 438/618
• US Class Current: 438/653
• CPC Class Codes: C23C 14/02 Pretreatment of the material to be coated C23C14/04 takes precedence
• CPC Class Codes: C23C 14/046 Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
• CPC Class Codes: C23C 16/02 Pretreatment of the material to be coated C23C16/04 takes precedence
• CPC Class Codes: C23C 16/045 Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
• CPC Class Codes: H01L 21/02063 the processing being the formation of vias or contact holes
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/28556 by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/3105 After-treatment
• CPC Class Codes: H01L 21/67207 comprising a chamber adapted to a particular process
• CPC Class Codes: H01L 21/76814 post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
• CPC Class Codes: H01L 21/76826 by contacting the layer with gases, liquids or plasmas
• CPC Class Codes: H01L 21/76841 Barrier, adhesion or liner layers
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric

Abstract

A semiconductor device manufacturing method includes: modifying a surface of a burying recess, of which surface is hydrophobic and which is formed in a dielectric film, to a hydrophilic state by supplying a plasma containing H ions and H radicals or a plasma containing NHx (x being 1, 2 or 3) ions and NHx radicals to the dielectric film formed on a substrate and containing silicon, carbon, hydrogen and oxygen, a bottom portion of the burying recess being exposed with a lower conductive layer; and directly forming an adhesion film formed of a Ru film on the hydrophilic surface of the recess. The method further includes burying copper forming a conductive path in the recess.

Claims

1. A semiconductor device manufacturing method comprising:

modifying a surface of a burying recess formed in a dielectric film by supplying dimethylethylenediamine in a liquid or a gaseous state to the dielectric film formed on a substrate and containing silicon, carbon, hydrogen and oxygen, a bottom portion of the burying recess being exposed with a lower conductive layer, wherein the dimethylethylenediamine is adsorbed onto the surface of the dielectric film to thereby enhance a nucleation and a growth of Ru;

directly forming a barrier film formed of a Ru film on the modified surface of the recess, wherein the Ru film is formed by using chemical vapor deposition Ru3(CO)12 gas and CO gas; and

burying copper forming a conductive path in the recess.

2. The semiconductor device manufacturing method of claim 1, wherein the Ru film essentially consists of Ru.

3. The semiconductor device manufacturing method of claim 1, wherein the Ru film is made of pure Ru.