Thin-film semiconductor device including a multi-layer channel layer, and method of manufacturing the same

• US 9,000,437 B2
• Filed: 03/21/2012
• Issued: 04/07/2015
• Est. Priority Date: 08/09/2011
• Status: Expired due to Fees

• Current Assignee: JOLED Inc.
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation), Panasonic Liquid Crystal Display Company Limited (Panasonic Holdings Corporation)
• Inventors: Hayashi, Hiroshi, Kawashima, Takahiro, Kawachi, Genshirou
• Primary Examiner(s): Bradford, Peter
• Application Number:
  US13/425,879
• Publication Number:
  US 20130037806A1
• Time in Patent Office: 1,112 Days
• Field of Search: 257/57, 257/59, 257/E29.289, 257/E29.29, 257/E29.291, 257/E21.409, 257/E29.273, 438/158
• US Class Current: 257/57
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78669 with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A thin-film semiconductor device according to the present disclosure includes: a substrate; a gate electrode formed above the substrate; a gate insulating film formed on the gate electrode; a channel layer that is formed of a polycrystalline semiconductor layer on the gate insulating film; an amorphous semiconductor layer formed on the channel layer and having a projecting shape in a surface; and a source electrode and a drain electrode that are formed above the amorphous semiconductor layer, and a first portion included in the amorphous semiconductor layer and located closer to the channel layer has a resistivity lower than a resistivity of a second portion included in the amorphous semiconductor layer and located closer to the source and drain electrodes.

Claims

1. A thin-film semiconductor device, comprising:

a substrate;

a gate electrode formed above the substrate;

a gate insulating film formed on the gate electrode;

a channel layer formed of a polycrystalline semiconductor layer on the gate insulating film;

an amorphous semiconductor layer formed on the channel layer and having a projecting portion in a surface thereof; and

a source electrode and a drain electrode that are formed above the amorphous semiconductor layer, wherein a first portion included in the amorphous semiconductor layer and located closer to the channel layer has a resistivity lower than a resistivity of a second portion included in the amorphous semiconductor layer and located closer to the source electrode and the drain electrode

the amorphous semiconductor layer comprises a flat portion and the projecting portion, the second portion of the amorphous semiconductor layer comprises a top portion of the projecting portion, and

the first portion of the amorphous semiconductor layer comprises a lower portion of the projecting portion and the flat portion,

wherein the projecting portion comprises a single projection, and the flat portion extends laterally from the projecting portion.

2. The thin-film semiconductor device according to claim 1,

wherein the first portion has an optical bandgap of 1.63 eV or more, and

the second portion has an optical bandgap of 1.60 eV or less.

3. The thin-film semiconductor device according to claim 1,

wherein the first portion has a refractive index of 4.2 or less, and

the second portion has a refractive index of 4.3 or more.

4. The thin-film semiconductor device according to claim 1,

wherein the first portion has an extinction coefficient of 0.11 orless, and

the second portion has an extinction coefficient of 0.12 or more.

5. The thin-film semiconductor device according to claim 1,

wherein the first portion contains hydrogen at a concentration of 13% or more, and

the second portion contains hydrogen at a concentration of 9% or less.

6. The thin-film semiconductor device according to claim 1,

wherein the amorphous semiconductor layer has a stacked structure consisting of a layer corresponding to the second portion and a layer corresponding to the first portion, and

the layer corresponding to the second portion is formed on the layer corresponding to the second portion is formed on the layer corresponding to the first potion.

7. The thin-film semiconductor device according to claim 1,

wherein the first portion is formed of an amorphous semiconductor containing a microcrystal component, and

the second portion is formed of an amorphous semiconductor having a noncrystalline structure.

8. The thin-film semiconductor device according to claim 1,

wherein a portion at a bottom of each of sides of the projecting portion in the amorphous semiconductor layer is a charge transfer path between the channel layer and one of the source electrode and the drain electrode.

9. The thin-film semiconductor device according to claim 1, further comprising

an insulating layer formed on a top surface of the projecting portion in the amorphous semiconductor layer.

10. The thin-film semiconductor device according to claim 9,

wherein the insulating layer has the same width as the top surface of the projecting portion in the amorphous semiconductor layer.

11. The thin-film semiconductor device according to claim 9, further comprising

a pair of contact layers each formed on:

a top surface of the insulating layer;

a side surface of the insulating layer;

a side surface included in the projecting portion in the amorphous semiconductor layer; and

a top surface of the amorphous semiconductor layer,

wherein the source electrode is formed above one of the pair of contact layers, and

the drain electrode is formed above the other of the pair of contact layers.

12. The thin-film semiconductor device according to claim 1,

wherein the polycrystalline semiconductor layer is made of polycrystalline silicon, and

the amorphous semiconductor layer is made of amorphous silicon.

13. The thin-film semiconductor device according to claim 1,

wherein the polycrystalline semiconductor layer includes a microcrystalline semiconductor layer having an average grain size of 20 nm or more and less than 40 nm.

14. The thin-film semiconductor device according to claim 1,

wherein the amorphous semiconductor layer includes a microcrystalline semiconductor layer having an average grain size of 20 nm or more and less than 40 nm.

15. The thin-film semiconductor device according to claim 1,

wherein the second portion in the amorphous semiconductor layer has a film thickness of 20 nm or more, the second portion being located closer to the source electrode and the drain electrode.

16. The thin-film semiconductor device according to claim 1, a periphery of the flat portion is outwards of a periphery of the gate electrode.

17. The thin-film semiconductor device according to claim 1, a periphery of the projecting portion is within a periphery of the gate electrode.

18. A method of manufacturing a thin-film semiconductor device, comprising:

preparing a substrate;

forming a gate electrode above the substrate;

forming a gate insulating film on the gate electrode;

forming a channel layer on the gate insulating film, the channel layer being formed of a polycrystalline semiconductor layer;

forming an amorphous semiconductor layer on the channel layer, the amorphous semiconductor layer having a projecting portion in a surface thereof; and

forming a source electrode and a drain electrode above the amorphous semiconductor layer,

wherein the amorphous semiconductor layer is formed such that a first portion located closer to the channel layer has a resistivity lower than a resistivity of a second portion located closer to the source electrode and the drain electrode,

the amorphous semiconductor layer comprises a flat portion and the projecting portion,

the second portion of the amorphous semiconductor layer comprises a top portion of the projecting portion, and

the first portion of the amorphous semiconductor layer comprises a lower portion of the projecting portion and the flat portion,

wherein the projecting portion comprises a single projection, and the flat portion extends laterally from the projecting portion.

19. The method of manufacturing a thin-film semiconductor device according to claim 18,

wherein the amorphous semiconductor layer is formed on the polycrystalline semiconductor layer so that a crystal grain is mixed in the first portion in the amorphous semiconductor layer.

20. The method of manufacturing a thin-film semiconductor device according to claim 19,

wherein an average size of the crystal grain is 20 nm or more and less than 40 nm.

21. The method of manufacturing a thin-film semiconductor device according to claim 18,

wherein the amorphous semiconductor layer is formed under the same forming condition so that the first portion and the second portion are continuously formed.

22. The method of manufacturing a thin-film semiconductor device according to claim 18,

wherein the first portion is formed under a first forming condition, and

the second portion is formed under a second forming condition different from the first forming condition.

23. The method of manufacturing a thin-film semiconductor device according to claim 18, further comprising

forming an insulating layer on a top surface of the projecting portion in the amorphous semiconductor layer, between the forming of an amorphous semiconductor layer and the forming of a source electrode and a drain electrode.