Small-grain three-dimensional memory

• US 9,001,555 B2
• Filed: 03/20/2013
• Issued: 04/07/2015
• Est. Priority Date: 03/30/2012
• Status: Active Grant

• Current Assignee: ChengDu HaiCun IP Technology LLC, Guobiao Zhang
• Original Assignee: ChengDu HaiCun IP Technology LLC, Guobiao Zhang
• Inventors: Zhang, Guobiao
• Primary Examiner(s): PHAN, TRONG Q
• Application Number:
  US13/848,018
• Publication Number:
  US 20130258740A1
• Time in Patent Office: 748 Days
• Field of Search: 365/51, 365/148, 365/163, 365/175, 365/225.7, 365/185.05, 365/185.33
• US Class Current: 365/148
• CPC Class Codes: G11C 11/5692 read-only digital stores using storage elements with more than two stable states
• CPC Class Codes: G11C 13/0004 comprising amorphous/crystalline phase transition cells
• CPC Class Codes: G11C 13/0007 comprising metal oxide memory material, e.g. perovskites
• CPC Class Codes: G11C 13/0011 comprising conductive bridging RAM [CBRAM] or programming metallization cells [PMCs]
• CPC Class Codes: G11C 17/10 in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
• CPC Class Codes: G11C 17/16 using electrically-fusible links
• CPC Class Codes: G11C 2213/71 Three dimensional array
• CPC Class Codes: G11C 2213/73 Array where access device function, e.g. diode function, being merged with memorizing function of memory element
• CPC Class Codes: G11C 5/02 Disposition of storage elements, e.g. in the form of a matrix array

Abstract

The present invention discloses a small-grain three-dimensional memory (3D-MSG). Each of its memory cells comprises a thin-film diode with critical dimension no larger than 40 nm. The thin-film diode comprises at least a small-grain material, whose grain size G is substantially smaller than the diode size D. The small-grain material is preferably a nano-crystalline material or an amorphous material. The critical dimension f of the small-grain diode is smaller than the critical dimension F of the single-crystalline transistor.

Claims

1. A small-grain three-dimensional memory, comprising:

a substrate level comprising a semiconductor substrate, said substrate level further comprising a plurality of functional transistors; and

at least a first memory level stacked above said semiconductor substrate and coupled to said substrate level through a plurality of inter-level vias, said memory level comprising a plurality of memory cells, wherein each of said memory cells comprises a small-grain diode with a critical dimension no larger than 40 nm, a grain size of said small-grain diode being substantially smaller than a small-grain diode size;

wherein the critical dimension of said first memory level is smaller than the critical dimension of said substrate level.

2. The small-grain three-dimensional memory according to claim 1, wherein said small-grain diode comprises at least one nano-crystalline material.

3. The small-grain three-dimensional memory according to claim 2, wherein the grain size of said nano-crystalline material is less than 10 nm.

4. The small-grain three-dimensional memory according to claim 2, wherein said nano-crystalline material is an amorphous material.

5. The small-grain three-dimensional memory according to claim 1, wherein said memory level comprises a plurality of mask-programmed read-only memory cells.

6. The small-grain three-dimensional memory according to claim 1, wherein said memory level comprises a plurality of electrically-programmable memory cells.

7. The small-grain three-dimensional memory according to claim 6, wherein said electrically-programmable memory cells are one-time-programmable (OTP) cells.

8. The small-grain three-dimensional memory according to claim 7, wherein said OTP cells comprise antifuses.

9. The small-grain three-dimensional memory according to claim 6, wherein said electrically-programmable memory cells are re-writable cells.

10. The small-grain three-dimensional memory according to claim 9, wherein said re-writable cells are resistive RAM (ReRAM) cells, phase-change memory (PCM) cells and/or programmable metallization cells (PMC).

11. The small-grain three-dimensional memory according to claim 1, further comprising a second memory level stacked above said first memory level, wherein the critical dimension of said second memory level is smaller than the critical dimension of said substrate level.

12. The small-grain three-dimensional memory according to claim 1, wherein the critical dimension of said first memory level is smaller than the critical dimension of the contemporary mass-produced flash memory.

13. The small-grain three-dimensional memory according to claim 12, further comprising a second memory level stacked above said first memory level, wherein the critical dimension of said second memory level is smaller than the critical dimension of the contemporary mass-produced flash memory.

14. An amorphous three-dimensional mask-programmed read-only memory with multi-bit-per-cell, comprising:

a substrate level comprising a semiconductor substrate, said substrate level further comprising a plurality of functional transistors; and

at least a first memory level stacked above said substrate and coupled to said substrate level through a plurality of inter-level vias, said memory level comprising a plurality of mask-programmed read-only memory cells, wherein each of said memory cells stores more than one bit and comprises an amorphous diode with a critical dimension no larger than 40 nm;

wherein the critical dimension of said first memory level is smaller than the critical dimension of said substrate level.

15. The amorphous three-dimensional mask-programmed read-only memory with multi-bit-per-cell according to claim 14, wherein selected ones of said memory cells comprise at least a first resistive layer.

16. The amorphous three-dimensional mask-programmed read-only memory with multi-bit-per-cell according to claim 14, wherein selected ones of said memory cells comprise at least a second resistive layers.

17. The amorphous three-dimensional mask-programmed read-only memory with multi-bit-per-cell according to claim 14, wherein selected ones of said memory cells comprise a first resistive layer and a second resistive layer.

18. The amorphous three-dimensional mask-programmed read-only memory with multi-bit-per-cell according to claim 14, further comprising a second memory level stacked above said first memory level, wherein the critical dimension of said second memory level is smaller than the critical dimension of said substrate level.

19. The amorphous three-dimensional mask-programmed read-only memory with multi-bit-per-cell according to claim 14, wherein the critical dimension of said first memory level is smaller than the critical dimension of the contemporary mass-produced flash memory.

20. The amorphous three-dimensional mask-programmed read-only memory with multi-bit-per-cell according to claim 19, further comprising a second memory level stacked above said first memory level, wherein the critical dimension of said second memory level is smaller than the critical dimension of the contemporary mass-produced flash memory.