Simultaneous testing of semiconductor components on a wafer

• US 9,002,673 B2
• Filed: 02/11/2011
• Issued: 04/07/2015
• Est. Priority Date: 06/16/2010
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Behzad, Arya Reza, Rofougaran, Ahmadreza, Zhao, Sam Ziqun, Castaneda, Jesus Alfonso, Boers, Michael
• Primary Examiner(s): HENSON, MISCHITA L
• Application Number:
  US13/025,657
• Publication Number:
  US 20110313710A1
• Time in Patent Office: 1,516 Days
• Field of Search: 702/108, 702117-118
• US Class Current: 702/118
• CPC Class Codes: G01R 31/2834 Automated test systems [ATE]; using microprocessors or computers G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736
• CPC Class Codes: G01R 31/3025 Wireless interface with the DUT
• CPC Class Codes: G01R 31/311 of integrated circuits G01R31/31728 takes precedence

Abstract

Methods and apparatus are disclosed to simultaneously, wirelessly test semiconductor components formed on a semiconductor wafer. The semiconductor components transmit respective outcomes of a self-contained testing operation to wireless automatic test equipment via a common communication channel. Multiple receiving antennas observe the outcomes from multiple directions in three dimensional space. The wireless automatic test equipment determines whether one or more of the semiconductor components operate as expected and, optionally, may use properties of the three dimensional space to determine a location of one or more of the semiconductor components. The wireless testing equipment may additionally determine performance of the semiconductor components by detecting infrared energy emitted, transmitted, and/or reflected by the semiconductor wafer before, during, and/or after a self-contained testing operation.

Claims

1. A wireless automatic test equipment for substantially simultaneously testing a plurality of semiconductor components formed onto a semiconductor wafer, comprising:

a receiver module configured to receive a plurality of testing operation outcomes from the plurality of semiconductor components to provide a plurality of recovered testing outcomes, the plurality of testing operation outcomes indicating outcomes of their respective semiconductor components in performing a testing operation;

a metric measurement module configured to determine a plurality of signal metrics of the plurality of recovered testing outcomes; and

a testing processor configured to determine a group of semiconductor components from among the plurality of semiconductor components whose outcomes are similar based upon the plurality of recovered testing outcomes and to determine a location of the group of semiconductor components within the semiconductor wafer based upon the plurality of signal metrics; and

a plurality of receiving antennas, coupled to the receiver module, configured to observe the plurality of testing operation outcomes from a plurality of directions in three dimensional space.

2. The wireless automatic test equipment of claim 1, wherein the plurality of receiving antennas is positioned along a radius of a spherical shell in the three dimensional space.

3. The wireless automatic test equipment of claim 1, wherein each of the plurality of receiving antennas is positioned along a corresponding radius of a corresponding spherical shell from among a plurality of spherical shells in the three dimensional space.

4. The wireless automatic test equipment of claim 1, wherein the receiver module is further configured to substantially simultaneously receive the plurality of testing operation outcomes over a common communication channel.

5. The wireless automatic test equipment of claim 1, wherein the receiver module is further configured to decode the plurality of testing operation outcomes in accordance with a multiple access transmission scheme to provide the plurality of recovered testing outcomes.

6. The wireless automatic test equipment of claim 5, wherein the multiple access transmission scheme is a code division multiple access (CDMA) scheme.

7. The wireless automatic test equipment of claim 1, wherein the testing processor is further configured to determine a second group of semiconductor components from among the plurality of semiconductor components whose outcomes are similar, but differ from the outcomes of the group of semiconductor components, based upon the plurality of recovered testing outcomes.

8. The wireless automatic test equipment of claim 7, wherein the testing processor is further configured to determine a second location of the second group of semiconductor components within the semiconductor wafer based upon the plurality of signal metrics.

9. The wireless automatic test equipment of claim 1, wherein the testing processor is further configured:

to assign each of the plurality of signal metrics that corresponds to the group of semiconductor components to a corresponding coordinate from among a plurality of sets of coordinates in three dimensional space,

to assign a unique identification number from among a plurality of unique identification numbers to each of the plurality of sets of coordinates, and

to map each of the plurality of unique identification numbers to its corresponding semiconductor component to determine the location of the group of semiconductor components.

10. The wireless automatic test equipment of claim 9, wherein the testing processor is farther configured to compare each coordinate from among the plurality of sets of coordinates to a corresponding predetermined signal metric from among a plurality of signal metrics to map each of the plurality of unique identification numbers to its corresponding semiconductor component.

11. The wireless automatic test equipment of claim 9, wherein the testing processor is further configured to iteratively map each of the plurality of unique identification numbers to its corresponding semiconductor component based upon relationships between the plurality of signal metrics.

12. The wireless automatic test equipment of claim 1, further comprising:

a transmitter module configured to receive a testing operation command signal from the testing processor and to encode the testing operation command signal to initiate the testing operation,

wherein the plurality of semiconductor components is configured to execute the testing operation in response to the encoded testing operation command signal.

13. The wireless automatic test equipment of claim 12, wherein the transmitter module is further configured to wirelessly send the encoded testing operation command signal to the plurality of semiconductor components.

14. The wireless automatic test equipment of claim 1, wherein the outcomes of the group of semiconductor components indicate that the first group of semiconductor components operates as expected.

15. The wireless automatic test equipment of claim 7, wherein the outcomes of the second group of semiconductor components indicate that the second group of semiconductor components operates unexpectedly.

16. A semiconductor component formed on a semiconductor wafer, comprising:

a testing module configured to store a first self-contained testing operation;

a first integrated circuit under test configured to provide an indication of operability in response to executing the first self-contained testing operation, the indication of operability indicating whether the first integrated circuit under test operates as expected, and the first integrated circuit under test further configured to execute the first self-contained testing operation concurrently with a second integrated circuit disposed on the semiconductor wafer executing a second self-contained testing operation; and

a transceiver module configured to encode the indication of operability in accordance with a multiple access transmission scheme, and further configured to wirelessly transmit the indication of operability to a wireless receiver in an automatic tester, concurrently with a wireless transmission from the second integrated circuit to the wireless receiver in the automatic tester, indicating the operability of the second integrated circuit;

wherein the first integrated circuit is further configured to execute the first self-contained testing operation in response to the transceiver module wirelessly receiving an initiate testing signal from a wireless transmitter in the automatic tester.

17. The semiconductor component of claim 16, wherein the multiple access transmission scheme is a code division multiple access (CDMA) scheme.

18. The semiconductor component of claim 16, wherein the transceiver module comprises:

an encoding module configured to encode the indication of operability in accordance with the multiple access transmission scheme to provide an encoded indication of operability;

a modulating module configured to modulate the encoded indication of operability in accordance with a digital modulation technique to provide a modulated indication of operability; and

an upconverter module configured to upconvert the modulated indication of operability to provide a testing operation outcome.

19. The semiconductor component of claim 18, wherein the encoding module comprises:

a spreading code generator configured to provide a sequence of bits that is unique to the semiconductor component; and

a spreading module configured to utilize the sequence of bits to encode the indication of operability.

20. The semiconductor component of claim 16, wherein the testing module is configured to store a unique identification number and to append the unique identification number to the indication of operability.

21. The semiconductor component of claim 20, wherein the semiconductor component is one of a plurality of semiconductor components that are formed on the semiconductor wafer, the unique identification number being one of a plurality of unique identification numbers that uniquely identify each of the plurality of semiconductor components.

22. The semiconductor component of claim 16, wherein the multiple access transmission scheme is a single carrier multiple access transmission scheme or a multiple carrier multiple access transmission scheme.

23. The semiconductor component of claim 16, wherein the multiple access transmission scheme is a single carrier multiple access transmission scheme comprising at least one of:

code division multiple access (CDMA);

frequency division multiple access (FDMA);

or

time division multiple access (TDMA).

24. The semiconductor component of claim 16, wherein the multiple access transmission scheme is a multiple carrier multiple access transmission scheme comprising at least one of:

discrete multi-tone (DMT) modulation;

orthogonal frequency division multiplexing (OFDM);

or

coded OFDM (COFDM).

25. The semiconductor component of claim 16, wherein the first Self-contained testing operation includes a plurality of instructions that are to be performed by the first integrated circuit under test, and

wherein the transceiver module is further configured to wirelessly receive the plurality of instructions or parameters to be utilized by the plurality of instructions from a control signal.

26. The semiconductor component of claim 16, wherein the transceiver module is further configured to provide the indication of operability during or after execution of the testing operation.