Controller with extended status register and method of use therewith
First Claim
1. A controller comprising:
- a first interface through which to communicate with a host;
a plurality of second interfaces through which to connect to a plurality of flash memory devices in parallel, wherein each of the plurality of flash memory devices comprises a three-dimensional memory;
a status register;
an extended status register, wherein the extended status register is a circular buffer; and
a processor in communication with the first and second interfaces, the status register, and the extended status register, wherein the processor is operative to;
store, in the extended status register, status information of a plurality of events in time across the plurality of flash memory devices by appending each event instance to a tail of the circular buffer;
monitor a head of the circular buffer to detect when the circular buffer is near a full/over-write condition;
in response to detecting that the circular buffer is near the full/over-write condition, set a fail indicator in the status register even though a present event is successful and does not, on its own, warrant the fail indicator being set in the status register;
receive a request from the host for the status information of the plurality of events; and
in response to the request, provide the status information of the plurality of events to the host for analysis, wherein the host receives the status information of the plurality of events on an aggregated basis rather than after each event;
wherein the status information includes an indication that the processor detected a failure in programming a page of data to a block of memory in the plurality of flash memory devices and copied that page and preceding pages in the block to a replacement block in the plurality of flash memory devices.
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Accused Products
Abstract
The embodiments described herein provide a controller with an extended status register and a method of use therewith. In one embodiment, a controller is provided with a first interface through which to communicate with a host and a second interface through which to communicate with a plurality of flash memory devices. The controller also comprises a status register, an extended status register, and a processor. The processor is operative to store, in the extended status register, status information of a plurality of events in time across the plurality of flash memory devices. The extended status register stores event status information, whereas the ONFI status register stores command status information. In response to a request from the host, the processor sends the status information of the plurality of events to the host for analysis.
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Citations
24 Claims
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1. A controller comprising:
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a first interface through which to communicate with a host; a plurality of second interfaces through which to connect to a plurality of flash memory devices in parallel, wherein each of the plurality of flash memory devices comprises a three-dimensional memory; a status register; an extended status register, wherein the extended status register is a circular buffer; and a processor in communication with the first and second interfaces, the status register, and the extended status register, wherein the processor is operative to; store, in the extended status register, status information of a plurality of events in time across the plurality of flash memory devices by appending each event instance to a tail of the circular buffer; monitor a head of the circular buffer to detect when the circular buffer is near a full/over-write condition; in response to detecting that the circular buffer is near the full/over-write condition, set a fail indicator in the status register even though a present event is successful and does not, on its own, warrant the fail indicator being set in the status register; receive a request from the host for the status information of the plurality of events; and in response to the request, provide the status information of the plurality of events to the host for analysis, wherein the host receives the status information of the plurality of events on an aggregated basis rather than after each event; wherein the status information includes an indication that the processor detected a failure in programming a page of data to a block of memory in the plurality of flash memory devices and copied that page and preceding pages in the block to a replacement block in the plurality of flash memory devices. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 19, 20, 21)
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9. A method for providing status information of a plurality of events in time across a plurality of flash memory devices, the method comprising:
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performing in a controller comprising a first interface through which to communicate with a host, a second interface through which to connect to a plurality of flash memory devices in parallel, wherein each of the plurality of flash memory devices comprises a three-dimensional memory, a status register, a extended status register, and a processor, wherein the extended status register is a circular buffer; storing, in the extended status register, status information of a plurality of events in time across the plurality of flash memory devices by appending each event instance to a tail of the circular buffer; monitoring a head of the circular buffer to detect when the circular buffer is near a full/over-write condition; in response to detecting that the circular buffer is near the full/over-write condition, setting a fail indicator in the status register even though a present event is successful and does not, on its own, warrant the fail indicator being set in the status register; receiving a request from the host for the status information of the plurality of events; and in response to the request, providing the status information of the plurality of events to the host for analysis, wherein the host receives the status information of the plurality of events on an aggregated basis rather than after each event; wherein the status information includes an indication that the processor detected a failure in programming a page of data to a block of memory in the plurality of flash memory devices and copied that page and preceding pages in the block to a replacement block in the plurality of flash memory devices. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18, 22, 23, 24)
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Specification