Data processing apparatus and data processing method

• US 9,003,167 B2
• Filed: 05/06/2011
• Issued: 04/07/2015
• Est. Priority Date: 05/14/2010
• Status: Active Grant

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Natori, Ryoko, Shiraga, Shinji
• Primary Examiner(s): Coleman, Eric
• Application Number:
  US13/102,168
• Publication Number:
  US 20110283088A1
• Time in Patent Office: 1,432 Days
• Field of Search: None
• US Class Current: 712/36
• CPC Class Codes: G06F 9/5066 Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs mappping at compile time, see G06F8/451

Abstract

A data processing apparatus includes a connecting unit that distributes the plurality of processing modules over the stages, and connects the plurality of processing modules such that a plurality of partial data are processed in parallel. The data processing apparatus detects, with respect to at least a part of the stages, a ratio of an amount of data for which processing in the subsequent stage has been executed, as a passage rate, acquires a processing time for a data amount to be processed in each stage, for which the passage rate was detected, based on the passage rate, and determines the number of processing modules distributed to each stage based on the data amount.

Claims

1. A data processing apparatus including a plurality of processors configured to sequentially execute data processing on a plurality of partial data of input data through a plurality of stages, wherein, in the data processing, it is determined, depending on a processing result of data in a preceding stage, whether or not to execute processing of data in a stage subsequent to the preceding stage, the apparatus comprising:

a CPU coupled to a memory, wherein the CPU is programmed to provide;

a connecting unit configured to allocate the plurality of processors over the plurality of stages, and to connect the plurality of processors such that a plurality of partial data pieces are processed in parallel;

a detecting unit configured to detect and update, sequentially, with respect to at least one of the plurality of stages, a ratio of an amount of data that has been processed in a stage to an amount of data that is to be processed in the stage, as a passage rate;

a calculation unit configured to calculate, each time the data processing has been executed on a predetermined number of partial data of the input data, respective numbers of processors to be allocated to the plurality of stages based on the passage rate detected by the detecting unit at a current time, if the passage rate has been changed from a previous time; and

a changing unit configured to change a connection between the plurality of processors connected by the connecting unit so that the respective numbers of processors calculated by the calculation unit are allocated to the plurality of stages.

2. The apparatus according to claim 1, wherein the calculation unit calculates the number of processors to be allocated to each stage according to a ratio of the data amount among stages.

3. The apparatus according to claim 1,

wherein the memory is configured to store a processing time required to process the partial data with respect to each of the plurality of processors, and

wherein the calculation unit:

calculates an accumulated passage rate for each stage based on the passage rates for preceding stages; and

calculates the number of processors to be allocated to each stage such that, for each stage, a processing time, calculated based on the accumulated passage rate, is uniform.

4. The apparatus according to claim 1,

wherein the detecting unit detects the passage rate for each of a predetermined data amount of the input data,

wherein the calculation unit calculates the number of processors to be allocated to each stage based on the passage rate detected for the predetermined data amount, and

wherein the changing unit changes, for the predetermined data amount, the connection between the plurality of processors connected by the connecting unit according to the number of processors to be allocated to each stage calculated by the calculation unit.

5. The apparatus according to claim 1, wherein the changing unit monitors whether or not processing by the processors has been completed, and, when the number of processors allocated by the connecting unit differs between adjacent stages, the changing unit connects a processor of the stage preceding the subsequent stage to a processor of the subsequent stage whose processing has been completed, in an order in which processing of the processors in the preceding stage was completed.

6. A data processing method in a data processing apparatus including a plurality of processors configured to sequentially execute data processing on a plurality of partial data of input data through a plurality of stages, wherein, in the data processing, it is determined, depending on a processing result of data in a preceding stage, whether or not to execute processing of the data in a stage subsequent to the preceding stage, the method comprising steps of:

allocating the plurality of processors over the plurality of stages;

connecting the plurality of processors such that a plurality of partial data pieces are processed in parallel;

detecting and updating, sequentially, with respect to at least one of the plurality of stages, a ratio of an amount of data that has been processed in a stage to an amount of data that is to be processed in the stage, as a passage rate;

calculating, each time the data processing has been executed on a predetermined number of partial data of the input data, respective numbers of processors to be allocated to the plurality of stages based on the passage rate detected in the detecting step at a current time, if the passage rate has been changed from a previous time; and

changing a connection between the plurality of processors connected in the connecting step so that the respective numbers of processors calculated in the calculating step are allocated to the plurality of stages.