Tj temperature calibration, measurement and control of semiconductor devices

• US 9,006,000 B2
• Filed: 05/03/2012
• Issued: 04/14/2015
• Est. Priority Date: 05/03/2012
• Status: Expired due to Fees

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Sandisk Technologies Incorporated (Western Digital Corporation)
• Inventors: Hanan, Deny, Redmard, Eddie, Dror, Itai
• Primary Examiner(s): Garber, Charles
• Assistant Examiner(s): PATERSON, BRIGITTE A
• Application Number:
  US13/463,056
• Publication Number:
  US 20130295697A1
• Time in Patent Office: 1,076 Days
• Field of Search: 438 10- 13
• US Class Current: 438/11
• CPC Class Codes: G01R 31/2644 Adaptations of individual semiconductor devices to facilitate the testing thereof
• CPC Class Codes: G01R 31/2884 using dedicated test connectors, test elements or test circuits on the IC under test G01R31/2855 takes precedence
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 Encapsulation

Abstract

A semiconductor device, such as a semiconductor die, is disclosed including embedded temperature sensors for scanning the junction temperature, Tj, at one or more locations of the semiconductor die while the die is operating. Once a temperature of a hot spot is detected that is above a temperature specified for the die or package containing the die, the die/package may be discarded. Alternatively, the functionality of the die may be altered in a way that reduces the temperature of the hot spots.

Claims

1. A method of providing a first semiconductor die in a semiconductor package, comprising:

(a) embedding a plurality of temperature sensors within the first semiconductor die;

(b) scanning one or more of the plurality of temperature sensors within the first semiconductor die while the semiconductor die first is operating to determine whether a temperature at one or more locations of the operating first semiconductor die exceed a predetermined temperature;

(c) determining that one or more locations of the first semiconductor die exceed the predetermined temperature; and

(d) configuring a package in which the first semiconductor die is to be included so that the first semiconductor die is mounted atop a second semiconductor die with the one or more locations of the first semiconductor die that exceed a predetermined temperature hanging over an edge of the second semiconductor die.

2. The method of claim 1, wherein the step (d) further comprises the step of adding a heat sink to the first semiconductor die over at least the one or more locations of the first semiconductor die exceeding the predetermined temperature during operation.

3. The method of claim 1, wherein the step (a) comprises the step of embedding an array of temperature sensors including a first number of rows and a second number of columns.

4. The method of claim 1, wherein the step (a) comprises the step of embedding an array of temperature sensors at locations predicted to run hotter than other locations of the first semiconductor die.

5. The method of claim 1, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the first semiconductor die is performed while the die is part of a wafer of dies.

6. The method of claim 5, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the first semiconductor die comprises the step of automatically scanning two or more of the plurality of temperature sensors simultaneously with scanning probes.

7. The method of claim 1, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the first semiconductor die is performed after the die is diced from of a wafer of dies and before the die is mounted on a substrate.

8. The method of claim 1, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the first semiconductor die is performed after the die is mounted on a substrate and before the substrate is wire bonded.

9. The method of claim 1, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the first semiconductor die is performed after the die is wire bonded to the substrate and before the die is encapsulated.

10. The method of claim 1, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the first semiconductor die is performed after the die is encapsulated.

11. The method of claim 1, wherein the first semiconductor die is a controller die.

12. A method of providing a controller die in a semiconductor package, comprising:

(a) embedding a plurality of temperature sensors within the controller die;

(b) scanning one or more of the plurality of temperature sensors within the controller die to determine whether a temperature at one or more locations of the controller die exceed a predetermined temperature;

(c) determining that one or more locations of the controller die exceed the predetermined temperature; and

(d) configuring a package in which the controller die is to be included so that the controller die is mounted atop a memory die with the one or more locations of the controller die that exceed a predetermined temperature hanging over an edge of the memory die.

21. The method of claim 12, wherein the step (a) comprises the step of embedding an array of temperature sensors including a first number of rows and a second number of columns.

22. The method of claim 12, wherein the step (a) comprises the step of embedding an array of temperature sensors at locations predicted to run hotter than other locations of the controller die.

23. The method of claim 12, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the controller die is performed while the die is part of a wafer of dies.

24. The method of claim 12, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the controller die comprises the step of automatically scanning two or more of the plurality of temperature sensors simultaneously with scanning probes.

25. The method of claim 12, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the controller die is performed after the die is diced from of a wafer of dies and before the die is mounted on a substrate.

26. The method of claim 12, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the controller die is performed after the die is mounted on a substrate and before the substrate is wire bonded.

27. The method of claim 12, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the controller die is performed after the die is wire bonded to the substrate and before the die is encapsulated.

28. The method of claim 12, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the controller die is performed after the die is encapsulated.

13. A method of providing a first semiconductor die in a semiconductor package, comprising:

(a) embedding a plurality of temperature sensors within the first semiconductor die;

(b) scanning one or more of the plurality of temperature sensors within the first semiconductor die to determine whether a temperature at one or more locations of the first semiconductor die exceed a predetermined temperature;

(c) determining that one or more locations of the first semiconductor die exceed the predetermined temperature; and

(d) configuring a package in which the first semiconductor die and a second semiconductor die are to be included with the first and second semiconductor die lying one on top of the other, with the one or more locations of the first semiconductor die that exceed a predetermined temperature positioned over an edge of the second semiconductor die.

14. The method of claim 13, wherein the step (a) comprises the step of embedding an array of temperature sensors including a first number of rows and a second number of columns.

15. The method of claim 13, wherein the step (a) comprises the step of embedding an array of temperature sensors at locations predicted to run hotter than other locations of the die.

16. The method of claim 13, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the first semiconductor die is performed while the die is part of a wafer of dies.

17. The method of claim 16, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the semiconductor die comprises the step of automatically scanning two or more of the plurality of temperature sensors simultaneously with scanning probes.

18. The method of claim 13, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the first semiconductor die is performed after the die is diced from of a wafer of dies and before the die is mounted on a substrate.

19. The method of claim 13, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the first semiconductor die is performed after the die is mounted on a substrate and before the substrate is wire bonded.

20. The method of claim 13, wherein the step (b) of scanning one or more of the plurality of temperature sensors within the first semiconductor die is performed after the die is wire bonded to the substrate and before the die is encapsulated.