Memory device in a programmed state having a memory layer comprising conductive nanoparticles coated with an organic film formed between two conductive layers
First Claim
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1. A memory device comprising:
- a first conductive layer;
a second conductive layer;
a memory layer interposed between the first conductive layer and the second conductive layer, wherein;
the memory layer includes a first portion and a second portion,wherein the second portion includes a composition and at least a nanoparticle including a first conductive material,wherein the nanoparticle is coated with an organic thin film, and provided into the composition,wherein the first portion comprises a second conductive material, the second conductive material is in electrical contact with the first conductive layer and the second conductive layer, andwherein the first portion and the second portion are in contact with the first conductive layer and the second conductive layer,a first partition wall and a second partition wall over the first conductive layer, the first partition wall and the second partition wall each having tapered shapes at its sides; and
an insulating layer over the second conductive layer, the first partition wall and the second partition wall,wherein the memory layer is provided over the first conductive layer between the first partition wall and the second partition wall,wherein a side surface of the memory layer and a side surface of the second conductive layer are in contact with the side with the tapered shape of the first partition wall or the second partition wall,wherein a top of the first partition and a top of the second partition are over a top surface of the second conductive layer,wherein the insulating layer is in contact with a whole top surface of the second conductive layer and is in contact with the top of the first partition wall and the top of the second partition wall, andwherein the insulating layer is separated from the side surface of the second conductive layer by the first partition wall or the second partition wall.
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Abstract
A memory device is provided, which includes a first conductive layer, a second conductive layer, and a memory layer interposed between the first conductive layer and the second conductive layer. The memory layer includes a first portion and a second portion, each of which includes at least a nanoparticle. The nanoparticle includes a conductive material coated with an organic film. The first portion is in contact with the first conductive layer and the second conductive layer, and a side surface of the first portion is surrounded by the second portion.
49 Citations
17 Claims
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1. A memory device comprising:
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a first conductive layer; a second conductive layer; a memory layer interposed between the first conductive layer and the second conductive layer, wherein; the memory layer includes a first portion and a second portion, wherein the second portion includes a composition and at least a nanoparticle including a first conductive material, wherein the nanoparticle is coated with an organic thin film, and provided into the composition, wherein the first portion comprises a second conductive material, the second conductive material is in electrical contact with the first conductive layer and the second conductive layer, and wherein the first portion and the second portion are in contact with the first conductive layer and the second conductive layer, a first partition wall and a second partition wall over the first conductive layer, the first partition wall and the second partition wall each having tapered shapes at its sides; and an insulating layer over the second conductive layer, the first partition wall and the second partition wall, wherein the memory layer is provided over the first conductive layer between the first partition wall and the second partition wall, wherein a side surface of the memory layer and a side surface of the second conductive layer are in contact with the side with the tapered shape of the first partition wall or the second partition wall, wherein a top of the first partition and a top of the second partition are over a top surface of the second conductive layer, wherein the insulating layer is in contact with a whole top surface of the second conductive layer and is in contact with the top of the first partition wall and the top of the second partition wall, and wherein the insulating layer is separated from the side surface of the second conductive layer by the first partition wall or the second partition wall. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A memory device comprising:
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a first conductive layer; a second conductive layer; a memory layer interposed between the first conductive layer and the second conductive layer; a transistor electrically connected to a memory element including the first conductive layer, the second conductive layer, and the memory layer, wherein; the memory layer includes a first portion and a second portion, wherein the second portion includes a composition and at least a nanoparticle including a first conductive material, wherein the nanoparticle is coated with an organic thin film, and provided into the composition, wherein the first portion comprises a second conductive material, the second conductive material is in electrical contact with the first conductive layer and the second conductive layer, and wherein the first portion and the second portion are in contact with the first conductive layer and the second conductive layer, a first partition wall and a second partition wall over the first conductive layer, the first partition wall and the second partition wall each having tapered shapes at its sides; and an insulating layer over the second conductive layer, the first partition wall and the second partition wall, wherein the memory layer is provided over the first conductive layer between the first partition wall and the second partition wall, wherein a side surface of the memory layer and a side surface of the second conductive layer are in contact with the side with the tapered shape of the first partition wall or the second partition wall, wherein a top of the first partition and a top of the second partition are over a top surface of the second conductive layer, wherein the insulating layer is in contact with a whole top surface of the second conductive layer and is in contact with the top of the first partition wall and the top of the second partition wall, and wherein the insulating layer is separated from the side surface of the second conductive layer by the first partition wall or the second partition wall. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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Specification