Radio to analog-to-digital sample rate decoupled from digital subsystem

• US 9,014,307 B2
• Filed: 02/25/2013
• Issued: 04/21/2015
• Est. Priority Date: 02/25/2013
• Status: Active Grant

• Current Assignee: Itron, Inc.
• Original Assignee: Itron, Inc.
• Inventors: Seely, Danny Ray
• Primary Examiner(s): Flores, Leon
• Application Number:
  US13/776,548
• Publication Number:
  US 20140241468A1
• Time in Patent Office: 785 Days
• Field of Search: 375/316, 375/340, 375/350, 375/355, 341/61, 455/102
• US Class Current: 375/340
• CPC Class Codes: H04L 1/0003 by switching between different modulation schemes
• CPC Class Codes: H04L 25/14 Channel dividing arrangements , i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
• CPC Class Codes: H04L 27/0002 analog front ends; means for connecting modulators, demodulators or transceivers to a transmission line duplex arrangements H04L5/143
• CPC Class Codes: H04L 27/0008 arrangements for allowing a transmitter or receiver to use more than one type of modulation negotiating modulation type for two-way transmission paths H04L5/1453
• CPC Class Codes: H04L 27/12 Modulator circuits; Transmitter circuits

Abstract

A multichannel radio receiver may include a radio frequency (RF) subsystem and a digital subsystem. The RF subsystem may be configured to provide analog information associated with a radio band to an analog to digital converter (ADC). The ADC samples the analog input and sends digital output to the digital subsystem. The digital subsystem may be configured with one or more channelizers and one or more decoders. A channelizer within the digital subsystem may filter and re-sample the digital output to result in a channel plan having a desired bandwidth and a desired sample rate. The sample rate may be selected for compatibility with a decoder. The decoder may have design specifications based in part on a modulation scheme to be decoded. The design specifications may indicate the desired sample rate to be provided by the channelizer.

Claims

1. A multichannel radio receiver, comprising:

a radio frequency (RF) subsystem to create analog information associated with a radio band spectrum;

an analog to digital converter (ADC) to sample the analog information and create digital output; and

a digital subsystem comprising;

a channelizer to receive the digital output, to tune the digital output according to a plurality of channel plans associated with a plurality of modulation schemes, respectively, and to re-sample each of multiple channels to an expected sample rate, the channelizer comprising;

a plurality of complex mixers to tune samples received from the ADC to channels centered at specified frequencies;

a plurality of cascaded integrated comb (CIC) decimators to receive input from the plurality of complex mixers and to provide decimation capability;

an interleaver to combine I/Q output from the plurality of CIC decimators;

an up-sampler and a down-sampler to set a sample rate of data received from the interleaver based at least in part on the expected sample rate; and

a channel filter to at least one of compensate for unflatness of the plurality of CIC decimators, remove re-sampling artifacts or set channel width; and

a decoder to receive data at the expected sample rate and to decode the multiple channels simultaneously according to the plurality of modulation schemes of the plurality of channel plans.

2. The multichannel radio receiver as recited in claim 1, wherein the plurality of channel plans includes channels separated by spacing that is irregular.

3. The multichannel radio receiver as recited in claim 1, wherein the plurality of channel plans includes channels of different bandwidths.

4. The multichannel radio receiver as recited in claim 1, wherein the digital subsystem is additionally configured to tune multiple channel plans and re-sample each of the multiple channel plans to different sample rates expected by different modulation schemes.

5. The multichannel radio receiver as recited in claim 1, wherein the digital subsystem is configured at least in part in a field programmable gate array (FPGA).

6. The multichannel radio receiver as recited in claim 1, wherein the digital subsystem is configured at least in part in a logic device.

7. The multichannel radio receiver as recited in claim 1, additionally comprising:

an arbitrary resampler for supporting an unlimited number of sample rates.

8. The multichannel radio receiver as recited in claim 1, wherein:

the channelizer is one of a plurality of channelizers, each channelizer configured to receive, tune, and re-sample the digital output according to a sample rate of a decoder; and

a plurality of decoders, associated with a plurality of modulation schemes, respectively, receive output from at least one channelizer.

9. A digital subsystem, comprising:

a channelizer to receive digital input, to tune the digital input into a channel plan comprising a plurality of irregularly spaced channels, and to sample the plurality of channels at a sample rate based in part on a modulation scheme of the channel plan, the channelizer comprising;

a plurality of complex mixers to tune samples received from an analog to digital converter (ADC) to channels centered at specified frequencies;

a plurality of cascaded integrated comb (CIC) decimators to receive input from the plurality of complex mixers and to provide decimation capability;

an interleaver to combine I/Q output from the plurality of CIC decimators;

an up-sampler and a down-sampler to set a sample rate of data received from the interleaver based at least in part on an expected sample rate; and

a channel filter to compensate for unflatness of the CIC decimators, remove re-sampling artifacts, and set channel width; and

a decoder to receive data at the expected sample rate from the channelizer and to decode the data according to the modulation scheme of the channel plan.

10. The digital subsystem as recited in claim 9, wherein the channelizer samples each of the plurality of channels using a plurality of devices to adjust a sample rate of the ADC to the sample rate that is based in part on the modulation scheme of the channel plan.

11. The digital subsystem as recited in claim 9, wherein:

the channelizer is one channelizer of a plurality of channelizers in a channelizer bank; and

the decoder is one decoder of a plurality of decoders in a decoder bank;

wherein each channelizer samples data at a rate that is compatible with decoding of a modulation scheme of a decoder to which the channelizer is paired.

12. A method of receiving data on a plurality of radio frequency (RF) channels, comprising:

receiving an RF signal;

sampling the received RF signal into a digital representation;

channelizing the digital representation to create channels of baseband I/Q samples, wherein the channelizing is performed by a plurality of complex mixers and tunes samples received from an analog to digital converter (ADC) to channels centered at specified frequencies, and wherein the channels have widths that are non-uniform and/or spacing that is not regular;

receiving input from the plurality of complex mixers and providing decimation capability by operation of a plurality of cascaded integrated comb (CIC) decimators;

combining I/Q output from the plurality of CIC decimators;

filtering the I/Q samples to a desired receive bandwidth, to thereby compensate for unflatness of the CIC decimators, remove re-sampling artifacts, or set channel width;

re-sampling the filtered I/Q samples to a rate expected by a decoder wherein the re-sampling is performed by operation of up-sampler and a down-sampler; and

decoding the re-sampled filtered I/Q samples according to a modulation scheme.

13. The method of claim 12, wherein the re-sampling is performed by a process involving at least one component that contributes to the sample rate expected by the decoder.

14. The method of claim 12, wherein the re-sampling is performed by an arbitrary re-sampler.

15. The method of claim 12, wherein:

the channelizing is performed by a plurality of channelizers, each channelizer associated with a channel plan, a resample rate, and a modulation scheme; and

the decoding is performed by a plurality of decoders, each decoder associated with at least one channelizer having a resample rate compatible with the decoder, and associated with a modulation scheme of the at least one decoder.