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Bit error rate based wear leveling for solid state drive memory

  • US 9,015,537 B2
  • Filed: 12/10/2013
  • Issued: 04/21/2015
  • Est. Priority Date: 01/20/2012
  • Status: Active Grant
First Claim
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1. A system for bit error rate (BER) based wear leveling in a solid state drive (SSD), the system comprising:

  • a program/erase (PE) cycle adjustment module and a plurality of blocks comprising solid state memory, the system configured to perform a method comprising;

    determining a block-level BER value for a block of the plurality of blocks;

    incrementing or decrementing an adjusted PE cycle count for the block based on the block-level BER value by the PE cycle adjustment module; and

    performing wear leveling in the SSD based on the adjusted PE cycle count by distributing PE cycling among a plurality of blocks in the SSD based on a respective adjusted PE cycle count of each of the plurality of blocks in the SSD.

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