Light emitting diode (LED) using three-dimensional gallium nitride (GaN) pillar structures

• US 9,018,081 B2
• Filed: 11/23/2013
• Issued: 04/28/2015
• Est. Priority Date: 12/27/2011
• Status: Active Grant

• Current Assignee: Elux Inc.
• Original Assignee: Sharp Laboratories of America Incorporated (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Crowder, Mark Albert, Zhan, Changqing, Schuele, Paul J.
• Primary Examiner(s): Parker, Kenneth
• Assistant Examiner(s): Fan, Bo
• Application Number:
  US14/088,374
• Publication Number:
  US 20140077158A1
• Time in Patent Office: 521 Days
• Field of Search: 257/13, 257/76, 257/9, 257/77, 257/79, 257/103
• US Class Current: 438/478
• CPC Class Codes: H01L 2224/48463 the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 2224/49107 on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/95085 being a liquid, e.g. for fluidic self-assembly
• CPC Class Codes: H01L 2224/95136 involving guiding structures, e.g. shape matching, spacers or supporting members
• CPC Class Codes: H01L 24/95 at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/10156 at the periphery
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 2933/0008 Processes
• CPC Class Codes: H01L 2933/0016 relating to electrodes
• CPC Class Codes: H01L 2933/0033 relating to semiconductor body packages
• CPC Class Codes: H01L 33/005 Processes
• CPC Class Codes: H01L 33/0075 comprising nitride compounds
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/04 with a quantum effect structure or superlattice, e.g. tunnel junction
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/08 with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body H01L27/15 takes precedence
• CPC Class Codes: H01L 33/18 within the light emitting region
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction
• CPC Class Codes: H01L 33/32 : containing nitrogen
• CPC Class Codes: H01L 33/42 : Transparent materials

Abstract

A method is provided for fabricating a light emitting diode (LED) using three-dimensional gallium nitride (GaN) pillar structures with planar surfaces. The method forms a plurality of GaN pillar structures, each with an n-doped GaN (n-GaN) pillar and planar sidewalls perpendicular to the c-plane, formed in either an m-plane or a-plane family. A multiple quantum well (MQW) layer is formed overlying the n-GaN pillar sidewalls, and a layer of p-doped GaN (p-GaN) is formed overlying the MQW layer. The plurality of GaN pillar structures are deposited on a first substrate, with the n-doped GaN pillar sidewalls aligned parallel to a top surface of the first substrate. A first end of each GaN pillar structure is connected to a first metal layer. The second end of each GaN pillar structure is etched to expose the n-GaN pillar second end and connected to a second metal layer.

Claims

1. A method for fabricating a light emitting diode (LED) using three-dimensional gallium nitride (GaN) pillar structures with planar surfaces, the method comprising:

growing an n-doped GaN (n-GaN) film overlying a substrate;

forming a plurality of openings in a first region of the n-GaN film, each opening having planar sidewalls perpendicular to a c-plane aligned with a top surface of the n-GaN film, and formed in a plane selected from a group consisting of an in-plane and a-plane family;

forming a multiple quantum well (MQW) layer overlying the first region of n-GaN film, including the planar sidewalls of the openings;

forming a layer of p-doped GaN (p-GaN) overlying the MQW layer;

depositing a first metal layer overlying a second region of the n-GaN film forming a first electrode; and

,

depositing a second metal layer overlying the p-GaN film to form a second electrode.

2. The method of claim 1 wherein forming the plurality of openings in the n-GaN film includes forming openings having a hexagonal shape.

3. The method of claim 1 wherein forming the plurality of openings in the n-GaN film includes:

forming cavities in the top surface of the n-GaN film;

wet etching the cavities in the n-GaN film top surface; and

,

forming planar sidewalls extending into the n-GaN film.

6. The method of claim 3 wherein forming cavities in the top surface of the n-GaN film includes using a process selects from a group consisting of plasma dry etching and laser ablation.

4. A light emitting diode (LED) with three-dimensional gallium nitride (GaN) pillar structures having planar surfaces, the LED comprising:

an n-doped GaN (n-GaN) film overlying a substrate, having a first region with a plurality of openings and a second region, each opening having planar sidewalls perpendicular to a c-plane aligned with a top surface of the n-GaN film, and formed in a plane selected from a group consisting of a m-plane family and an a-plane family;

a multiple quantum well (MQW) layer overlying the n-GaN film first region, including the planar sidewalls of the openings;

a layer of p-doped GaN (p-GaN) overlying the MQW layer;

a first metal layer overlying the second region of n-GaN film forming a first electrode; and

,

a second metal layer overlying the p-GaN film to form a second electrode.

5. The LED of claim 4 wherein the plurality of openings in the n-GaN film each have a hexagonal shape.

7. A method for fabricating a light emitting diode (LED) using three-dimensional gallium nitride (GaN) pillar structures with planar surfaces, the method comprising:

growing an n-doped GaN (n-GaN) film overlying a substrate;

generating a pattern of dislocation defects in a top surface of the n-GaN film;

wet etching the dislocation defects in the n-GaN film to remove n-GaN material damages in response to forming the dislocation defects;

stopping the removal of n-GaN material in response to encountering planes selected from a group consisting of c-planes, m-planes, and a-planes;

forming a plurality of openings in a first region of the n-GaN film, each opening having planar sidewalls perpendicular to a c-plane aligned with a top surface of the n-GaN film, and formed in a plane selected from a group consisting of an in-plane and a-plane family;

forming a multiple quantum well (MQW) layer overlying the first region of n-GaN film, including the planar sidewalls of the openings;

forming a layer of p-doped GaN (p (a) overlying the MQW layer;

depositing a first metal layer overlying a second region of the n-GaN film forming a first electrode; and

,

depositing a second metal layer overlying the p-GaN film to form a second electrode.

8. The method of claim 7 wherein forming the plurality of openings in the n-GaN film includes forming openings having a hexagonal shape.

9. The method of claim 7 wherein forming dislocation defects in the top surface of the n-GaN film includes using a process selects from a group consisting of plasma dry etching and laser ablation.