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Direct-drain trench FET with source and drain isolation

  • US 9,018,700 B2
  • Filed: 02/05/2014
  • Issued: 04/28/2015
  • Est. Priority Date: 03/14/2013
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • a semiconductor layer of a first conductivity type, the semiconductor layer having a top-side surface;

    a well region of a second conductivity type opposite the first conductivity type, the well region being disposed in an upper portion of the semiconductor layer;

    a gate trench disposed in the semiconductor layer, the gate trench extending through the well region;

    a drain contact disposed, at least in part, on the top-side surface of the semiconductor layer, the drain contact being adjacent to the well region;

    an isolation trench disposed between the drain contact and the gate trench in the semiconductor layer, the isolation trench extending through the well region;

    a termination trench disposed in the semiconductor layer and disposed between the gate trench and the isolation trench, the termination trench extending through the well region; and

    at least one termination electrode disposed in the termination trench.

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