Sample and hold capacitance to digital converter
First Claim
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1. A circuit for converting a quantity of charge into a digital value, the circuit comprising:
- a sample and hold circuit configured to sample the quantity of charge from a capacitive sense matrix, the sample and hold circuit comprising an integrator that receives the quantity of charge from the capacitive sense matrix and converts the quantity of charge into a voltage; and
an analog to digital converter that converts the voltage into a digital value,wherein the integrator comprises an operational amplifier, a capacitor connected between an input terminal and an output terminal of the operational amplifier, and an additional capacitor connected to the output terminal of the operational amplifier,wherein the sample and hold circuit further comprises a switch in parallel with the capacitor to reset the capacitor, and an additional switch in series between the input terminal of the operational amplifier and the additional capacitor to connect the additional capacitor in parallel with the capacitor,wherein the switch in parallel with the capacitor is connected to the output terminal of the operational amplifier;
wherein the integrator is isolated from the capacitive sense matrix while the analog to digital converter converts the voltage into the digital value, andwherein the circuit further comprises at least one switch that resets a voltage across a capacitance between one or more selected lines and one or more selected columns of the capacitive sense matrix while the analog to digital converter converts the voltage into the digital value.
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Abstract
A circuit for converting charge measured from a touch screen into a digital signal can include a sample and hold circuit. The sample and hold circuit can sample and integrate a charge from a capacitive sense matrix, and hold a voltage signal representing the measured charge. A sigma delta converter can convert the voltage into a digital value.
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Citations
15 Claims
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1. A circuit for converting a quantity of charge into a digital value, the circuit comprising:
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a sample and hold circuit configured to sample the quantity of charge from a capacitive sense matrix, the sample and hold circuit comprising an integrator that receives the quantity of charge from the capacitive sense matrix and converts the quantity of charge into a voltage; and an analog to digital converter that converts the voltage into a digital value, wherein the integrator comprises an operational amplifier, a capacitor connected between an input terminal and an output terminal of the operational amplifier, and an additional capacitor connected to the output terminal of the operational amplifier, wherein the sample and hold circuit further comprises a switch in parallel with the capacitor to reset the capacitor, and an additional switch in series between the input terminal of the operational amplifier and the additional capacitor to connect the additional capacitor in parallel with the capacitor, wherein the switch in parallel with the capacitor is connected to the output terminal of the operational amplifier; wherein the integrator is isolated from the capacitive sense matrix while the analog to digital converter converts the voltage into the digital value, and wherein the circuit further comprises at least one switch that resets a voltage across a capacitance between one or more selected lines and one or more selected columns of the capacitive sense matrix while the analog to digital converter converts the voltage into the digital value. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of measuring and converting a quantity of charge into a digital value, the method comprising:
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sampling the quantity of charge from a capacitive sense matrix; integrating the quantity of charge to produce a voltage using an integrator comprising an operational amplifier with a capacitor connected between an input terminal and an output terminal of the operational amplifier; storing the voltage using the capacitor; resetting the voltage across a capacitance between one or more selected lines and one or more selected columns of the capacitive sense matrix using at least one switch while converting the voltage into a digital value; isolating the integrator from the capacitive sense matrix while converting the voltage into a digital value; sharing charge between the capacitor and an additional capacitor by turning on a switch connecting the additional capacitor in parallel with the capacitor; resetting the capacitor by turning on a switch in parallel with the capacitor; detecting a change in a reference voltage of a display screen; sampling a second quantity of charge from the capacitive sense matrix; and canceling the sampling of the second quantity of charge from the capacitive sense matrix in response to the detecting of the change in the reference voltage. - View Dependent Claims (8, 9, 10, 11, 12, 13, 15)
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14. A circuit for processing a signal from a capacitive sense matrix, the circuit comprising:
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an integrator comprising an operational amplifier and a capacitor connected between an input terminal and an output terminal of the operational amplifier, and an additional capacitor connected to the output terminal of the operational amplifier; at least one first switch configured to provide a quantity of charge from a sense node of the capacitive sense matrix to the integrator, wherein the integrator is configured to convert the quantity of charge into a voltage; an analog to digital converter that converts the voltage into a digital value; at least one switch in parallel with the capacitor to reset the capacitor; and an additional switch in series between the input terminal of the operational amplifier and the additional capacitor to connect the additional capacitor in parallel with the capacitor, wherein the at least one switch in parallel with the capacitor is connected to the output terminal of the operational amplifier, wherein the integrator is isolated from the capacitive sense matrix while the analog to digital converter converts the voltage into the digital value, wherein the circuit further comprises at least one second switch that resets a voltage across a capacitance between one or more selected lines and one or more selected columns of the capacitive sense matrix while the analog to digital converter converts the voltage into the digital value.
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Specification