Computer or microchip including a network portion with RAM memory erasable by a firewall-protected master controller

• US 9,021,011 B2
• Filed: 11/27/2013
• Issued: 04/28/2015
• Est. Priority Date: 11/29/1996
• Status: Expired due to Fees

• Current Assignee: Frampton E. Ellis
• Original Assignee: Frampton E. Ellis
• Inventors: Ellis, Frampton E.
• Primary Examiner(s): SHOLEMAN, ABU S
• Application Number:
  US14/092,707
• Publication Number:
  US 20140089374A1
• Time in Patent Office: 517 Days
• Field of Search: 726/3, 726/11, 726/13, 726/26, 726/34, 713/189, 713/192, 380/59, 709/1, 709/225, 709/205
• US Class Current: 709/201
• CPC Class Codes: A01N 25/30 characterised by the surfactants
• CPC Class Codes: G06F 1/16 Constructional details or arrangements
• CPC Class Codes: G06F 11/1666 where the redundant component is memory or memory area
• CPC Class Codes: G06F 11/2035 without idle spare hardware
• CPC Class Codes: G06F 15/76 Architectures of general purpose stored program computers with program plugboard G06F15/08; multicomputers G06F15/16
• CPC Class Codes: G06F 21/00 Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
• CPC Class Codes: G06F 9/5072 Grid computing
• CPC Class Codes: H04L 43/00 Arrangements for monitoring or testing data switching networks
• CPC Class Codes: H04L 63/02 for separating internal from external traffic, e.g. firewalls
• CPC Class Codes: H04L 63/0209 Architectural arrangements, e.g. perimeter networks or demilitarized zones
• CPC Class Codes: H04L 67/02 based on web technology, e.g. hypertext transfer protocol [HTTP]
• CPC Class Codes: H04L 67/10 in which an application is distributed across nodes in the network software deployment G06F8/60; multiprogramming arrangements G06F9/46
• CPC Class Codes: H04L 69/14 Multichannel or multilink protocols
• CPC Class Codes: H04L 69/329 in the application layer [OSI layer 7]
• CPC Class Codes: H04L 9/40 Network security protocols
• CPC Class Codes: Y04S 40/00 Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them

Abstract

A computer or microchip including a master controlling device, network communication components, one or more microprocessors and RAM, an internal hardware firewall located between a protected portion that is protected by the internal hardware firewall and a network portion. The internal hardware firewall denies access to at least the protected portion of the computer or microchip from the network. The firewall permits unrestricted access by the network to the network portion so that processing operations other than network communications and firewall operations conducted with the network are executed by microprocessors and RAM in the network portion. The master controlling device has preemptive control of the microprocessors and RAM in the network portion including erasure of at least a part of the random access memory (RAM) prior to the use of the network portion of the computer or microchip by the user or the operating system.

Claims

1. A computer or microchip, comprising:

a master controlling device of the computer or microchip,

an internal hardware firewall having a location between a protected portion of the computer or microchip that is protected by the internal hardware firewall and a network portion of the computer or microchip, the network portion having a connection for a network of computers including the World Wide Web and/or the Internet;

the internal hardware firewall denies access to at least the protected portion of the computer or microchip from the network; and

network communications devices located in the network portion of the computer or microchip; and

one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors or processing units and random access memory (RAM) that are not network communications devices, wherein the one or more microprocessors or processing units and random access memory (RAM) are located in the network portion of the computer or microchip and are separate from the internal hardware firewall; and

wherein the location of the internal hardware firewall permits unrestricted access by the network of computers to the network portion of the computer or microchip so that processing operations other than network communications and firewall operations conducted by the computer or microchip with the network of computers are executed by one or more of the microprocessors or processing units and random access memory (RAM) in the network portion of the computer or microchip; and

wherein the master controlling device is located in the protected portion of the computer or microchip and has preemptive control of the microprocessors or processing units and random access memory (RAM) in the network portion of the computer or microchip, and

the preemptive control including erasure of at least a part of the random access memory (RAM) in the network portion of the computer or microchip prior to use of the network portion of the computer or microchip by a user or operating system of the computer or microchip.

2. The computer or microchip of claim 1, wherein the preemptive control includes erasure of all of the random access memory (RAM) in the network portion of the computer or microchip prior to the use of the network portion of the computer or microchip by the user or the operating system of the computer or microchip.

3. The computer or microchip of claim 1, wherein all or part of the random access memory (RAM) in the network portion is erased prior to network use of the network portion of the computer or microchip.

4. The computer or microchip of claim 1, wherein the erasure of the part of the random access memory (RAM) in the network portion is by the user or by the operating system.

5. The computer or microchip of claim 2, wherein the erasure of all of the random access memory (RAM) in the network portion is by the user or by the operating system.

6. The computer or microchip of claim 2, wherein all or part of the random access memory (RAM) in the network portion is volatile memory and is erased by power interruption to the random access memory (RAM).

7. The computer or microchip of claim 2, wherein all or part of the random access memory (RAM) in the network portion is non-volatile memory and is erased by overwriting the random access memory (RAM).

8. The computer or microchip of claim 2, wherein the computer or microchip includes one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 additional internal firewalls, each protecting a microprocessor or processing unit with an integrated random access memory (RAM).

9. The computer or microchip of claim 2, wherein the protected portion of the computer or microchip includes random access memory (RAM) protected by one or more additional internal firewalls.

10. The computer or microchip of claim 2, wherein the protected portion and/or the network portion of the computer or microchip include one or more additional internal firewalls.

11. The computer or microchip of claim 8, wherein the computer or microchip is configured so that the user or the operating system of the computer or microchip saves one or more files in at least a part of the random access memory (RAM).

12. The computer or microchip of claim 10, wherein the computer or microchip is configured so that the user or the operating system of the computer or microchip uses the network portion of the computer or microchip and saves one or more files in random access memory (RAM) that is located in the network portion of the computer or microchip and that is protected by the one or more additional internal firewalls.

13. The computer or microchip of claim 10, wherein the computer or microchip is configured so that the user or the operating system of the computer or microchip uses the network portion of the computer or microchip and transfers one or more files between the network portion and random access memory (RAM) that is located in the protected portion of the computer or microchip and that is protected by one or additional internal firewalls.

19. The computer or microchip of claim 11, wherein the computer or microchip is a personal computer or microchip and the user is a personal user.

20. The computer or microchip of claim 12, wherein the computer or microchip is a personal computer or microchip and the user is a personal user.

21. The computer or microchip of claim 13, wherein the computer or microchip is a personal computer or microchip and the user is a personal user.

14. A computer or microchip comprising:

a master controlling device of the computer or microchip,

an internal hardware firewall located between a protected portion of the computer or microchip that is protected by the internal hardware firewall and a network portion of the computer or microchip, the network portion having a connection for a network of computers including the World Wide Web and/or the Internet;

the internal hardware firewall denies access to at least the protected portion of the computer or microchip from the network; and

network communications devices located in the network portion of the computer or microchip; and

one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors or processing units and random access memory (RAM) that are not network communications devices, wherein the one or more microprocessors or processing units and random access memory (RAM) are located in the network portion of the computer or microchip and are separate from the internal hardware firewall; and

wherein a location of the internal hardware firewall permits unrestricted access by the network of computers to the network portion of the computer or microchip so that processing operations other than network communications and firewall operations conducted by the computer or microchip with the network of computers are executed by one or more of the microprocessors or processing units and random access memory (RAM) in the network portion of the computer or microchip; and

wherein the master controlling device is located in the protected portion of the computer or microchip and has preemptive control of the microprocessors or processing units and random access memory (RAM) in the network portion of the computer or microchip, and

the preemptive control including erasure of at least a part of the random access memory (RAM) in the network portion of the computer or microchip prior to use of the network portion of the computer or microchip by a user or operating system of the computer or microchip, and wherein at least a portion of the computer or microchip is surrounded by a first Faraday Cage.

15. The computer or microchip of claim 14, wherein the computer or microchip is surrounded by a second Faraday Cage.

16. The computer or microchip of claim 15, wherein the computer or microchip is surrounded by a second Faraday Cage.

17. A computer or microchip comprising:

a master controlling device of the computer or microchip,

an internal hardware firewall located between a protected portion of the computer or microchip that is protected by the internal hardware firewall and a network portion of the computer or microchip, the network portion having a connection for a network of computers including the World Wide Web and/or the Internet;

the internal hardware firewall denies access to at least the protected portion of the computer or microchip from the network; and

network communications devices located in the network portion of the computer or microchip; and

one or more or at least two or four or eight or 16 or 32 or 64 or 128 or 256 or 512 or 1024 microprocessors or processing units and random access memory (RAM) that are not network communications devices, wherein the one or more microprocessors or processing units and random access memory (RAM) are located in the network portion of the computer or microchip and are separate from the internal hardware firewall; and

wherein a location of the internal hardware firewall permits unrestricted access by the network of computers to the network portion of the computer or microchip so that processing operations other than network communications and firewall operations conducted by the computer or microchip with the network of computers are executed by one or more of the microprocessors or processing units and random access memory (RAM) in the network portion of the computer or microchip; and

wherein the master controlling device is located in the protected portion of the computer or microchip and has preemptive control of the microprocessors or processing units and random access memory (RAM) in the network portion of the computer or microchip, and

the preemptive control including erasure of at least a part of the random access memory (RA M) in the network portion of the computer or microchip prior to use of the network portion of the computer or microchip by a user or operating system of the computer or microchip, and wherein the erasure of the part of the random access memory (RAM) in the network portion is by the user or by the operating system and the computer or microchip is a personal computer or microchip and the user is a personal user.

18. The computer or microchip of claim 17, wherein the computer or microchip is surrounded by a first Faraday Cage.