Fibre channel input/output data routing including discarding of data transfer requests in response to error detection

• US 9,021,155 B2
• Filed: 06/01/2011
• Issued: 04/28/2015
• Est. Priority Date: 06/01/2011
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Bender, Carl A., Bubb, Clinton E., Casper, Daniel F., Flanagan, John R.
• Primary Examiner(s): Abad, Farley
• Assistant Examiner(s): YU, HENRY W
• Application Number:
  US13/150,583
• Publication Number:
  US 20120311199A1
• Time in Patent Office: 1,427 Days
• Field of Search: 718/100
• US Class Current: 710/33
• CPC Class Codes: G06F 13/122 where hardware performs an I/O function other than control of data transfer
• CPC Class Codes: G06F 13/426 using an embedded synchronisation, e.g. Firewire bus, Fibre Channel bus, SSA bus

Abstract

A computer program product is provided for performing input/output (I/O) processing. The computer program product is configured to perform: generating and storing in local channel memory at least one address control word (ACW) specifying one or more host memory locations for data transfer and including a data discard field; generating an address control structure specifying a local channel memory location of a corresponding ACW; receiving one or more data transfer requests from a network interface that each corresponding address control structure information; accessing an ACW and routing the data transfer request to a host memory location specified in the ACW; and responsive to encountering an error during at least one of the accessing and the routing, discarding the one or more data transfer requests and setting the data discard field to a value configured to instruct a channel to discard any subsequent data transfer requests associated with the ACW.

Claims

1. A computer program product for performing an input/output (I/O) processing operation at a host computer system configured for communication with a control unit, the computer program product comprising:

a non-transitory tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising;

obtaining information relating to an I/O operation at a channel subsystem in the host computer system, the channel subsystem including at least one channel having a channel processor and a local channel memory;

generating at least one address control word (ACW) specifying one or more host memory locations for transfer of data between the host computer system and the control unit, and storing the at least one ACW in the local channel memory, the at least one ACW including a data discard field;

generating an address control structure for each data transfer specified by the I/O operation and forwarding each address control structure from the at least one channel to a network interface between the channel subsystem and the control unit, each address control structure specifying a location in the local channel memory of a corresponding ACW, each address control structure configured to be used by the network interface to fetch or store information into or out of the host memory, wherein each address control structure is forwarded to and stored in the network interface prior to forwarding the I/O operation to the control unit;

forwarding an I/O command message to at least one I/O device via the network interface;

based on the I/O command message, receiving one or more data transfer requests from the network interface that each include location information specified by a corresponding address control structure;

accessing an ACW at a local channel memory location specified by an address field in a data transfer request and routing the data transfer request to the host memory location specified in the ACW; and

based on encountering an error during at least one of the accessing and the routing, discarding the one or more data transfer requests and setting the data discard field to a value configured to instruct the channel to discard any subsequent data transfer requests associated with the ACW, the data discard field value setting persisting until an I/O operation completion status is received at the channel subsystem from the network interface.

2. The computer program product of claim 1, wherein the data discard field is a discard bit in the ACW, and setting the discard bit includes setting the value from a zero to a one.

3. The computer program product of claim 1, wherein the method further comprises, based on the channel receiving a subsequent data transfer request, accessing the ACW and discarding the subsequent data transfer request based on the discard bit having a value of one.

4. The computer program product of claim 1, wherein receiving the data transfer request includes:

routing each of the one or more data transfer requests to a request queue selected from a Fetch Array Queue configured to hold one or more consecutive output data requests for output data in the host memory, and a Store Array Queue configured to hold one or more consecutive input data requests to store input data at the host memory; and

routing the one or more data transfer requests from the request queue to processing logic when the data transfer request reaches a top of the request queue, the processing logic configured to generate a host memory request.

5. The computer program product of claim 4, wherein the one or more data transfer requests includes one or more output data requests that request a transfer of output data from the host memory and include a local channel memory address of a Transport Write Data ACW, and discarding includes:

stopping the one or more output data requests in the Fetch Array Queue from and any subsequent output data requests from being transferred to the processing logic; and

setting the discard bit in the Transport Write Data ACW to one.

6. The computer program product of claim 5, wherein the method further comprises discarding any output data transfer requests and any host memory requests having an address control structure that corresponds to the Transport Write Data ACW, and responding to the one or more output data transfer requests with an abort status.

7. The computer program product of claim 4, wherein the one or more data transfer requests includes one or more input data requests that request a transfer of input data into the host memory and include a local channel memory address of a Transport Read Data ACW, and discarding includes:

stopping the one or more input data requests in the Store Array Queue and any subsequent input data requests from being transferred to the processing logic; and

setting the discard bit in the Transport Read Data ACW to one.

8. The computer program product of claim 7, wherein discarding further comprises:

setting a counter with a value corresponding to a number of host memory requests that have been generated from input data requests routed from the Store Array Queue and are pending in the processing logic;

decrementing the value for each host memory response received from the host memory until the value is a zero value indicating that all host memory responses have been received; and

preventing any further host memory requests from being made that correspond to the Transport Read Data ACW.

9. The computer program product of claim 1, wherein the I/O operation is a transport mode operation, and obtaining information includes obtaining a transport command word (TCW) at the channel subsystem, the TCW including a transport command control block (TCCB) address field including an address of a TCCB, the TCCB including a plurality of device command words (DCW) that each includes an I/O command.

10. The computer program product of claim 1, wherein the address control structure is forwarded to the network interface prior to the network interface being informed of the I/O operation.

26. The computer program product of claim 1, wherein generating the address control structure and forwarding each address control structure to the network interface is performed prior to forwarding the I/O command message to the at least one I/O device.

11. A method of performing an input/output (I/O) processing operation at a host computer system configured for communication with a control unit, the method comprising:

obtaining information relating to an I/O operation at a channel subsystem in the host computer system, the channel subsystem including at least one channel having a channel processor and a local channel memory;

generating at least one address control word (ACW) specifying one or more host memory locations for transfer of data between the host computer system and the control unit, and storing the at least one ACW in the local channel memory, the at least one ACW including a data discard field;

generating an address control structure for each data transfer specified by the I/O operation and forwarding each address control structure from the at least one channel to a network interface between the channel subsystem and the control unit, each address control structure specifying a location in the local channel memory of a corresponding ACW, each address control structure configured to be used by the network interface to fetch or store information into or out of the host memory, wherein each address control structure is forwarded to and stored in the network interface prior to forwarding the I/O operation to the control unit;

forwarding an I/O command message to at least one I/O device via the network interface;

based on the I/O command message, receiving one or more data transfer requests from the network interface that each include location information specified by a corresponding address control structure;

accessing an ACW at a local channel memory location specified by an address field in a data transfer request and routing the data transfer request to the host memory location specified in the ACW; and

based on encountering an error during at least one of the accessing and the routing, discarding the one or more data transfer requests and setting the data discard field to a value configured to instruct the channel to discard any subsequent data transfer requests associated with the ACW, the data discard field value setting persisting until an I/O operation completion status is received at the channel subsystem from the network interface.

12. The method of claim 11, wherein the data discard field is a discard bit in the ACW, and setting the discard bit includes setting the value from a zero to a one.

13. The method of claim 11, further comprising, based on the channel receiving a subsequent data transfer request, accessing the ACW and discarding the subsequent data transfer request based on the discard bit having a value of one.

14. The method of claim 11, wherein receiving the data transfer request includes:

routing each of the one or more data transfer requests to a request queue selected from a Fetch Array Queue configured to hold one or more consecutive output data requests for output data in the host memory, and a Store Array Queue configured to hold one or more consecutive input data requests to store input data at the host memory; and

routing the one or more data transfer requests from the request queue to processing logic when the data transfer request reaches a top of the request queue, the processing logic configured to generate a host memory request.

15. The method of claim 14, wherein the one or more data transfer requests includes one or more output data requests that request a transfer of output data from the host memory and include a local channel memory address of a Transport Write Data ACW, and discarding includes:

stopping the one or more output data requests in the Fetch Array Queue from and any subsequent output data requests from being transferred to the processing logic; and

setting the discard bit in the Transport Write Data ACW to one.

16. The method of claim 15, further comprising discarding any output data transfer requests and any host memory requests having an address control structure that corresponds to the Transport Write Data ACW, and responding to the one or more output data transfer requests with an abort status.

17. The method of claim 14, wherein the one or more data transfer requests includes one or more input data requests that request a transfer of input data into the host memory and include a local channel memory address of a Transport Read Data ACW, and discarding includes:

stopping the one or more input data requests in the Store Array Queue and any subsequent input data requests from being transferred to the processing logic; and

setting the discard bit in the Transport Read Data ACW to one.

18. The method of claim 17, wherein discarding further comprises:

setting a counter with a value corresponding to a number of host memory requests that have been generated from input data requests routed from the Store Array Queue and are pending in the processing logic;

decrementing the value for each host memory response received from the host memory until the value is a zero value indicating that all host memory responses have been received; and

preventing any further host memory requests from being made that correspond to the Transport Read Data ACW.

27. The method of claim 11, wherein generating the address control structure and forwarding each address control structure to the network interface is performed prior to forwarding the I/O command message to the at least one I/O device.

19. An apparatus for performing an input/output (I/O) processing operation at a host computer system configured for communication with a control unit, the host computer system including a channel subsystem, the channel subsystem configured to communicate with the control unit via a network interface, the channel subsystem configured to perform:

obtaining information relating to an I/O operation at a channel subsystem in the host computer system, the channel subsystem including at least one channel having a channel processor and a local channel memory;

generating at least one address control word (ACW) specifying one or more host memory locations for transfer of data between the host computer system and the control unit, and storing the at least one ACW in the local channel memory, the at least one ACW including a data discard field;

generating an address control structure for each data transfer specified by the I/O operation and forwarding each address control structure from the at least one channel to a network interface between the channel subsystem and the control unit, each address control structure specifying a location in the local channel memory of a corresponding ACW, each address control structure configured to be used by the network interface to fetch or store information into or out of the host memory, wherein each address control structure is forwarded to and stored in the network interface prior to forwarding the I/O operation to the control unit;

forwarding an I/O command message to at least one I/O device via the network interface;

based on the I/O command message, receiving one or more data transfer requests from the network interface that each include location information specified by a corresponding address control structure;

accessing an ACW at a local channel memory location specified by an address field in a data transfer request and routing the data transfer request to the host memory location specified in the ACW; and

based on encountering an error during at least one of the accessing and the routing, discarding the one or more data transfer requests and setting the data discard field to a value configured to instruct the channel to discard any subsequent data transfer requests associated with the ACW, the data discard field value setting persisting until an I/O operation completion status is received at the channel subsystem from the network interface.

20. The apparatus of claim 19, wherein the data discard field is a discard bit in the ACW, and setting the discard bit includes setting the value from a zero to a one.

21. The apparatus of claim 19, wherein the channel subsystem is further configured to perform, based on the channel receiving a subsequent data transfer request, accessing the ACW and discarding the subsequent data transfer request based on the discard bit having a value of one.

22. The apparatus of claim 19, wherein receiving the data transfer request includes:

routing each of the one or more data transfer requests to a request queue selected from a Fetch Array Queue configured to hold one or more consecutive output data requests for output data in the host memory, and a Store Array Queue configured to hold one or more consecutive input data requests to store input data at the host memory; and

routing the one or more data transfer requests from the request queue to processing logic when the data transfer request reaches a top of the request queue, the processing logic configured to generate a host memory request.

23. The apparatus of claim 22, wherein the one or more data transfer requests includes one or more output data requests that request a transfer of output data from the host memory and include a local channel memory address of a Transport Write Data ACW, and discarding includes:

stopping the one or more output data requests in the Fetch Array Queue from and any subsequent output data requests from being transferred to the processing logic; and

setting the discard bit in the Transport Write Data ACW to one.

24. The apparatus of claim 22, wherein the one or more data transfer requests includes one or more input data requests that request a transfer of input data into the host memory and include a local channel memory address of a Transport Read Data ACW, and discarding includes:

stopping the one or more input data requests in the Store Array Queue and any subsequent input data requests from being transferred to the processing logic; and

setting the discard bit in the Transport Read Data ACW to one.

25. The apparatus of claim 24, wherein discarding further comprises:

setting a counter with a value corresponding to a number of host memory requests that have been generated from input data requests routed from the Store Array Queue and are pending in the processing logic;

decrementing the value for each host memory response received from the host memory until the value is a zero value indicating that all host memory responses have been received; and

preventing any further host memory requests from being made that correspond to the Transport Read Data ACW.

28. The apparatus of claim 19, wherein generating the address control structure and forwarding each address control structure to the network interface is performed prior to forwarding the I/O command message to the at least one I/O device.