Storage system and method for controlling memory in storage system
First Claim
1. A storage system comprising:
- a first controller having a first processor and a first memory; and
a second controller having a second processor and a second memory,wherein each of the first and the second memories includes a shared memory storing control information,wherein the first and second controllers are coupled to each other;
wherein the storage system is configured to have master side information managing a master type of the control information,wherein the first processor is configured to;
determine whether the control information is double master information or single master information on a basis of the master side information;
in a case that the control information is the double master information, lock the shared memories in the first and second memories, perform an update process of the control information in the shared memories of the first and second memories, and release the lock of the shared memories in the first and second memories after the update process, the second processor being configured not to perform other update process of the control information in the shared memories of the first and second memories when the shared memories are locked; and
in a case that the control information is the single master information, perform the update process of the control information without locking the shared memories in the first and second memories,wherein in a case that the control information is the double master information, the control information in the shared memories of the first and second memories is capable of being read from both the first and second processors, andwherein in a case that the control information is the single master information, the control information in only one of the first and second memories is capable of being read from both the first and second processors.
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Accused Products
Abstract
According to a storage system of a prior art adopting a cluster structure, various types of large-capacity memories were arranged to enhance the access performance, so that the system required a dedicated control circuit, and there was difficulty in realizing cost reduction and improvement of access performance simultaneously. In order to solve the problems, the present invention provides a storage system in which a group of memories is integrated to MPU memories directly coupled to MPUs in respective controller units, wherein each MPU memory is divided into a duplication information area and a non-duplication information area, and attribute information for controlling accesses thereto are provided. Further, each duplication information area is provided with a double master information area capable of referring to a first memory and a second memory and a single master information area capable of referring only to either the first memory or the second memory, and the accesses thereto are performed based on the attribute information.
12 Citations
15 Claims
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1. A storage system comprising:
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a first controller having a first processor and a first memory; and a second controller having a second processor and a second memory, wherein each of the first and the second memories includes a shared memory storing control information, wherein the first and second controllers are coupled to each other; wherein the storage system is configured to have master side information managing a master type of the control information, wherein the first processor is configured to; determine whether the control information is double master information or single master information on a basis of the master side information; in a case that the control information is the double master information, lock the shared memories in the first and second memories, perform an update process of the control information in the shared memories of the first and second memories, and release the lock of the shared memories in the first and second memories after the update process, the second processor being configured not to perform other update process of the control information in the shared memories of the first and second memories when the shared memories are locked; and in a case that the control information is the single master information, perform the update process of the control information without locking the shared memories in the first and second memories, wherein in a case that the control information is the double master information, the control information in the shared memories of the first and second memories is capable of being read from both the first and second processors, and wherein in a case that the control information is the single master information, the control information in only one of the first and second memories is capable of being read from both the first and second processors. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method for controlling a storage system, the storage system comprising:
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a first controller having a first processor and a first memory; and a second controller having a second processor and a second memory, wherein each of the first and the second memories includes a shared memory storing control information, wherein the first and second controllers are coupled to each other, wherein the storage system is configured to have master side information managing a master type of the control information, wherein the method comprises; determining, by the first processor, whether the control information is double master information or single master information on a basis of the master side information; in a case that the control information is the double master information, locking, by the first processor, the shared memories in the first and second memories; performing, by the first processor, an update process of the control information in the shared memories of the first and second memories; releasing, by the first processor, the lock of the shared memories in the first and second memories after the update process; not performing, by the second processor, other update process of the control information in the shared memories of the first and second memories when the shared memories are locked, the control information in the shared memories of the first and second memories capable of being read from both the first and second processors; in a case that control information is the single master information, performing, by the first processor, the update process of the control information without locking the shared memories in the first and second memories, the control information in only one of the first and second memories capable of being read from both the first and second processors. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
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Specification