Method of forming a spacer patterning mask

• US 9,023,224 B2
• Filed: 05/15/2014
• Issued: 05/05/2015
• Est. Priority Date: 05/17/2013
• Status: Active Grant

• Current Assignee: Semiconductor Manufacturing International Corporation
• Original Assignee: Semiconductor Manufacturing International Corporation
• Inventors: Wang, Xinpeng, Zhang, Haiyang
• Primary Examiner(s): Tran, Binh X
• Assistant Examiner(s): PHAM, THOMAS T
• Application Number:
  US14/278,538
• Publication Number:
  US 20140342559A1
• Time in Patent Office: 355 Days
• Field of Search: 438/692, 216/38, 216/46, 216/52
• US Class Current: 216/46
• CPC Class Codes: H01L 21/0337 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/30625 With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
• CPC Class Codes: H01L 21/3083 characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane

Abstract

The present disclosure pertains to a method of forming a spacer patterning mask. The method entails: providing a substrate; depositing, on the substrate, an interface layer, a core film and a first hard mask; patterning the core film and the first hard mask to form strips; depositing a spacer patterning layer to cover the core film and the first hard mask in the intermediate pattern; planarizing the spacer patterning layer by using the first hard mask in the intermediate pattern as a stop layer; etching the planarized spacer patterning layer; dry etching the second hard mask to expose the partially-etched spacer patterning layer; dry etching the exposed spacer patterning layer to form a spacer pattern; and removing the remaining first hard mask and second hard mask and the core film to obtain the final spacer patterning mask.

Claims

1. A method of forming a spacer patterning mask, comprising:

providing a substrate;

depositing, on the substrate, an interface layer, a core film and a first hard mask;

patterning the core film and the first hard mask to form strips that include the core film and the first hard mask, wherein a first separation distance between neighboring strips is based on a second separation distance between patterns of the spacer patterning mask;

depositing a spacer patterning layer over the core film and the first hard mask;

planarizing the spacer patterning layer by using the first hard mask as a stop layer,

wherein the planarizing comprises using chemical mechanical polishing (CMP);

etching the spacer patterning layer, wherein an amount of etching is determined based on a separation distance and dimensions of patterns in the spacer patterning mask;

depositing a second hard mask;

dry etching the second hard mask to expose the spacer patterning layer, wherein a third separation distance between sections of the second hard mask has a predefined relation to the second separation distance between patterns of the spacer patterning mask;

dry etching the spacer patterning layer to form a spacer pattern;

removing the first hard mask and second hard mask; and

removing the core film to obtain the spacer patterning mask.

2. The method according to claim 1, wherein the interface layer comprises silicon oxide, further comprising depositing the interface layer by using chemical vapour deposition (CVD) or furnace process to a thickness of 10-500 Å

.

3. The method according to claim 1, wherein the core film comprises a silicon film or amorphous carbon, further comprising depositing the core film by using chemical vapour deposition (CVD).

4. The method according to claim 1, further comprising:

depositing the first hard mask by using a furnace process, and

depositing the second hard mask by ALD or CVD to form a layer of the same thickness as the first hard mask, wherein the first and second hard masks comprise silicon nitride.

5. The method according to claim 1, wherein the first separation distance between neighboring strips is twice as large as the second separation distance between patterns of the spacer patterning mask.

6. The method according to claim 1, further comprising depositing the spacer patterning layer comprising silicon oxide by using atomic layer deposition (ALD) or CVD, wherein a thickness of the spacer patterning layer is greater than a sum of thickness of the core film and thickness of the first hard mask.

7. The method according to claim 1, further comprising etching the spacer patterning layer by using a wet removal process, such that the spacer patterning layer is lower than or flush with the bottom of the first hard mask.

8. The method according to claim 1, further comprising dry etching the second hard mask such that the third separation distance between sections of the remaining second hard mask is equal to the second separation distance between patterns of the spacer patterning mask.

9. The method according to claim 1, further comprising using a wet etch to remove the first hard mask and the second hard mask.

10. The method according to claim 1, further comprising:

using a dry removal process to remove the core film comprising amorphous carbon, wherein the dry removal process comprises a fluorine-free asking process using an atmosphere of N₂/H₂/SO₂/CO/CO₂/O₂; and

using a wet chemical removal process to remove the core film comprising silicon.

11. The method according to claim 1, wherein during the etching, the core film and the first hard mask remain substantially intact during the etching of the spacer patterning layer.

12. The method according to claim 1, wherein the spacer patterning layer and the first hard mask remain substantially intact during the dry etch of the second hard mask.

13. The method according to claim 1, wherein the depositing of the second hard mask comprises depositing the second hard mask over the spacer patterning layer and the first hard mask.

14. The method according to claim 1, wherein the depositing of the interface layer, the core film, and the first hard mask on the substrate are done sequentially.