Thin film transistor, method for manufacturing same, active matrix substrate, display panel and display device

• US 9,024,311 B2
• Filed: 04/06/2010
• Issued: 05/05/2015
• Est. Priority Date: 06/24/2009
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Hara, Takeshi, Nishiki, Hirohiko, Chikama, Yoshimasa, Nakagawa, Kazuo, Ohta, Yoshifumi, Aita, Tetsuya, Suzuki, Masahiko, Nakagawa, Okifumi, Mizuno, Yuuji, Takei, Michiko, Harumoto, Yoshiyuki, Miyajima, Yoshiyuki
• Primary Examiner(s): Monbleau, Davienne
• Assistant Examiner(s): HILLMAN, DAMON A
• Application Number:
  US13/379,670
• Publication Number:
  US 20120138923A1
• Time in Patent Office: 1,855 Days
• Field of Search: 257/43, 438/151, 438/149
• US Class Current: 257/43
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

The present invention provides a thin film transistor including an oxide semiconductor layer (4) for electrically connecting a signal electrode (6a) and a drain electrode (7a), the an oxide semiconductor layer being made from an oxide semiconductor; and a barrier layer (6b) made from at least one selected from the group consisting of Ti, Mo, W, Nb, Ta, Cr, nitrides thereof, and alloys thereof, the barrier layer (6b) being in touch with the signal electrode (6a) and the oxide semiconductor layer (4) and separating the signal electrode (6a) from the oxide semiconductor layer (4). Because of this configuration, the thin film transistor can form and maintain an ohmic contact between the first electrode and the channel layer, thereby being a thin film transistor with good properties.

Claims

1. A thin film transistor comprising:

a channel layer arranged to electrically connect a first electrode and a second electrode, the channel layer being made from an oxide semiconductor;

a protection layer provided directly on an upper surface of the first electrode and an upper surface of the second electrode, the protection layer also being in direct contact with an upper surface of the channel layer;

an insulating layer provided directly on an upper surface of the protection layer;

a pixel electrode provided directly on an upper surface of the insulating layer; and

a first barrier layer made from at least one selected from the group consisting of Ti, Mo, W, Nb, Ta, Cr, nitrides thereof, and alloys thereof, wherein

the first barrier layer is in contact with the first electrode and the channel layer and is arranged to separate the first electrode from the channel layer;

the pixel electrode is in direct contact with the upper surface of the second electrode through contact holes provided within the protection layer and the insulating layer; and

a lateral edge of the first barrier layer is arranged inward from a lateral edge of the channel layer, the lateral edge of the channel layer being directly covered by the protection layer.

2. The thin film transistor as set forth in claim 1, wherein the first electrode is made from Cu, Al, Ag, or an Al alloy.

3. The thin film transistor as set forth in claim 2, wherein:

the first electrode is made from the Al alloy; and

the Al alloy contains Al, Cu, and at least one selected from the group consisting of Co, Rh, Ni, Pd, C, Si, Ge, Sn, and La.

4. The thin film transistor as set forth in claim 3, wherein Cu content in the Al alloy is 0.1 wt % or more but 5.0 wt % or less.

5. The thin film transistor as set forth in claim 1, wherein the first barrier layer is made from Ti, Mo, a Ti alloy, or a Mo—

Ti alloy.

6. The thin film transistor as set forth in claim 1, further comprising:

a second barrier layer made from at least one selected from the group consisting of Ti, Mo, W, Nb, Ta, Cr, nitrides thereof, and alloys thereof,

the second barrier layer being in touch with the second electrode and the channel layer and separating the second electrode from the channel layer.

7. The thin film transistor as set forth in claim 6, wherein the second electrode is made from Cu, Al, Ag, or an Al alloy.

8. The thin film transistor as set forth in claim 7, wherein:

the second electrode is made from the Al alloy; and

the Al alloy contains Al, Cu, and at least one selected from the group consisting of Co, Rh, Ni, Pd, C, Si, Ge, Sn, and La.

9. The thin film transistor as set forth in claim 8, wherein Cu content in the Al alloy is 0.1 wt % or more but 5.0 wt % or less.

10. The thin film transistor as set forth in claim 6, wherein the second barrier layer is made from Ti, Mo, a Ti alloy, or a Mo—

Ti alloy.

11. The thin film transistor as set forth in claim 1, wherein the oxide semiconductor contains at least one selected from the group consisting of In, Ga, Al, Si, Sn, Cu, and Zn.

12. An active matrix substrate comprising a thin film transistor as set forth in claim 1.

13. A display panel comprising an active matrix substrate as set forth in claim 12.

14. A display device comprising a display panel as set forth in claim 13.

16. The thin film transistor as set forth in claim 1, wherein the first barrier layer has a substantially same shape as that of the first electrode.

17. The thin film transistor as set forth in claim 6, wherein the first barrier layer has a substantially same shape as that of the first electrode, and the second barrier layer has a substantially same shape as that of the second electrode.

18. The thin film transistor as set forth in claim 6, wherein

a lateral edge of the second barrier layer is arranged inward from another lateral edge of the channel layer which is directly covered by the protection layer.

15. A method for manufacturing a thin film transistor including a channel layer arranged to electrically connect a first electrode and a second electrode, the channel layer being made from an oxide semiconductor, the method comprising:

a channel layer forming step for forming the channel layer on a substrate;

a barrier layer forming step for forming, on the channel layer, a first barrier layer made from at least one selected from the group consisting of Ti, Mo, W, Nb, Ta, Cr, nitrides thereof, and alloys thereof;

an electrode forming step for depositing the first electrode on the first barrier layer;

a protection layer forming step for forming, directly on an upper surface of the first electrode and an upper surface of the second electrode, a protection layer, the protection layer also being in direct contact with an upper surface of the channel layer;

an insulating layer forming step for forming, directly on an upper surface of the protection layer, an insulating layer; and

a pixel electrode forming step for forming, directly on an upper surface of the insulating layer, a pixel electrode, wherein

the first barrier layer is in contact with the first electrode and the channel layer and is arranged to separate the first electrode from the channel layer;

the pixel electrode is in direct contact with the upper surface of the second electrode through contact holes provided within the protection layer and the insulating layer;

the barrier layer forming step further includes a barrier layer patterning step of patterning the barrier layer using a resist pattern to form a lateral edge of the barrier layer; and

the channel layer forming step further includes a channel layer patterning step of patterning the channel layer using the resist pattern, which has been deformed by a thermal treatment, to form a lateral edge of the channel layer, the lateral edge of the channel layer is positioned outward from the lateral edge of the barrier layer.