Electrical and optical devices incorporating topological materials including topological insulators

• US 9,024,415 B2
• Filed: 12/06/2011
• Issued: 05/05/2015
• Est. Priority Date: 12/07/2010
• Status: Expired due to Fees

• Current Assignee: Board of Trustees of the Leland Stanford Junior University (Stanford Management Co.)
• Original Assignee: Board of Trustees of the Leland Stanford Junior University (Stanford Management Co.)
• Inventors: Zhang, Shoucheng, Zhang, Xiao
• Primary Examiner(s): Yang, Minchul
• Application Number:
  US13/312,942
• Publication Number:
  US 20120138887A1
• Time in Patent Office: 1,246 Days
• Field of Search: 257/9, 257/2, 257/3, 257/629, 257/E29.168, 257/E29.323, 372/43.01
• US Class Current: 257/629
• CPC Class Codes: H01F 1/0009 Antiferromagnetic materials, i.e. materials exhibiting a Néel transition temperature H01F1/0036 takes precedence
• CPC Class Codes: H01F 1/401 diluted
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 31/08 in which radiation controls flow of current through the device, e.g. photoresistors
• CPC Class Codes: H10N 50/10 Magnetoresistive devices

Abstract

An electrical device includes a current transport layer formed using a layer of a topological material selected from the group of a topological insulator, a quantum anomalous hall (QAH) insulator, a topological insulator variant, and a topological magnetic insulator. In one embodiment, the current transport layer forms a conductive wire on an integrated circuit where the conductive wire includes two spatially separated edge channels, each edge channel carrying charge carriers propagating in one direction only. In other embodiments, an optical device includes an optical layer formed using a layer of the topological material. The optical layer can be a light absorbing layer, a light emitting layer, a light transport layer, or a light modulation layer.

Claims

1. An electrical device, comprising:

an integrated circuit comprising a current transport layer formed using a layer of a topological insulator material, wherein the topological insulator material has an insulating energy band gap in the bulk and conducting edge or surface states,

the layer of topological insulator material having a width of at least 10nm;

a first electrode formed on the integrated circuit and in electrical contact with the current transport layer at a first location;

a second electrode formed on the integrated circuit and in electrical contact with the current transport layer at a second location;

a first circuit connected to a first electrode; and

a second circuit connected to the second electrode,

the first circuit, the second circuit, the first electrode, the second electrode, and the layer of topological insulator material being configured to carry current in either direction between the first circuit and the second circuit,

wherein the layer of the topological insulator material contains magnetic doping, and

wherein the topological insulator material is selected from the group of;

(1) HgTe;

(2) a compound comprising at least two of Bi, Sb, Te, and Se;

(3) a ternary Heusler compound;

(4) AmN; and

(5) PuTe.

2. The electrical device of claim 1, wherein the layer of topological material comprises a two-dimensional (2D) or three-dimensional (3D) topological insulator layer with an insulating energy band gap in the bulk and conducting edge or surface states, respectively, protected by time-reversal symmetry.

3. The electrical device of claim 2, wherein the layer of topological material comprises a two-dimensional (2D) or three-dimensional (3D) topological insulator variant layer, the topological insulator variant layer being formed from a 2D or 3D topological insulator layer by thickness control, by magnetic doping, or by applying an electrical potential to the topological insulator layer.

4. The electrical device of claim 3, wherein the 2D topological insulator variant layer is formed by varying the thickness of a 2D topological insulator layer, wherein when the thickness of the 2D topological insulator layer is varied, the 2D topological insulator variant layer becomes a topological insulator or a trivial insulator.

5. The electrical device of claim 3, wherein the 2D topological insulator variant layer is formed from a 2D topological insulator layer having a thickness close to a critical thickness, the 2D topological insulator variant layer becoming a conductor layer.

6. The electrical device of claim 3, wherein the 3D topological insulator variant layer is formed by varying the thickness of a 3D topological insulator layer, wherein when the thickness of the 3D topological insulator layer is reduced, the surface states of the topological insulator layer become gapped or have an appreciable energy band gap and the 3D topological insulator variant layer becomes a 2D insulator.

7. The electrical device of claim 6, wherein the layer of topological material comprises a 3D topological insulator variant layer having a reduced thickness and being subjected to an electrical potential, wherein the surface states of the 3D topological insulator variant layer become a topological insulator or a trivial insulator having a gapped energy band gap or appreciable energy band gap.

8. The electrical device of claim 3, wherein the topological insulator variant layer is a topological insulator layer being subjected to an electrical potential.

9. The electrical device of claim 3, wherein the layer of topological material comprises a 3D topological insulator variant layer being subjected to an electrical potential, wherein upon the application of the electrical potential to the 3D topological insulator variant layer, the surface states of the 3D topological insulator variant layer become a topological insulator or a trivial insulator having a gapped energy band gap or appreciable energy band gap.

10. The electrical device of claim 1, wherein the topological insulator layer is a 2D or 3D topological insulator layer containing magnetic doping, wherein the topological material is connected in a programmable circuit such that a field applied to the topological material changes a magnetic domain formed by the magnetic doping to control a conductivity of the topological material, thereby selectively forming an electrical connection in the programmable circuit.

11. The electrical device of claim 10, wherein the topological insulator layer contains surface magnetic doping.

12. The electrical device of claim 10, wherein the topological insulator layer is a topological insulator layer containing magnetic doping at the surface and in the bulk of the topological material.

13. The electrical device of claim 1, wherein the quantum anomalous hall insulator layer has an insulating energy band gap in the bulk and gapless chiral edge states protected by the first Chern number.

14. The electrical device of claim 1, wherein the topological insulator layer comprises a three-dimensional topological magnetic insulator layer wherein an antiferromagnetic order breaks the time-reversal symmetry of an insulator layer spontaneously and magnetic fluctuations of the topological magnetic insulator layer are coupled linearly to an axion field.

15. The electrical device of claim 1, wherein the current transport layer forms a conductive wire on the integrated circuit being configured as an interconnect between the first circuit and the second circuit, wherein the conductive wire comprises two spatially separated edge channels in the topological material, each edge channel carrying charge carriers propagating in one direction only, the two edge channels carrying charge carriers propagating in opposite directions.

16. The electrical device of claim 15, wherein the layer of the topological material forming the conductive wire comprises a two-dimensional quantum anomalous hall insulator layer with an insulating energy band gap in the bulk and gapless chiral edge states protected by the first Chern number, the chiral edge state being an edge state that carries current uni-directionally, the two-dimensional quantum anomalous hall insulator layer being formed a first distance away from a ground plate or a second wire, the load having a second terminal coupled to the ground plate or to the second wire.

17. The electrical device of claim 15, wherein the layer of the topological material comprises a three-dimensional topological insulator variant layer with magnetic doping, the three-dimensional topological insulator variant layer being a material with an insulating energy band gap in the bulk and the magnetic doping of the topological insulator variant layer breaking the time-reversal symmetry of the surface states,

wherein the three-dimensional topological insulator variant layer with magnetic doping includes a first region of a first magnetic domain and a second region of a second magnetic domain, the second magnetic domain being opposite to the first magnetic domain, the first and second regions being formed by magnetic doping of the topological insulator variant layer, and wherein the conductive wire comprises an axion string interconnect formed at the boundary between the first region and the second region.

18. The electrical device of claim 17, wherein the axion string interconnect comprises a programmable interconnect where programming of the axion string interconnect is realized by changing the polarities of the first and second magnetic domains.

19. The electrical device of claim 1, wherein the current transport layer comprises a transparent electrode.