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Power quad flat no-lead (PQFN) package

  • US 9,024,420 B2
  • Filed: 11/11/2013
  • Issued: 05/05/2015
  • Est. Priority Date: 12/13/2010
  • Status: Active Grant
First Claim
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1. A power quad flat no-lead (PQFN) semiconductor package comprising:

  • a leadframe comprising a plurality of die pads;

    a driver integrated circuit (IC) coupled to a top surface of a first die pad of said leadframe;

    a plurality of vertical conduction power transistors including a first group of vertical conduction power transistors coupled to a top surface of a common die pad of said leadframe and a second group of vertical conduction power transistors individually coupled to respective top surfaces of separate die pads of said leadframe;

    a top surface electrode of one of said first group of vertical conduction power transistors being electrically connected to a bottom surface electrode of one of said second group of vertical conduction power transistors;

    at least one wirebond providing direct electrical connection between said driver IC and one of said plurality of vertical conduction power transistors;

    wherein each of said first die pad, said common die pad and said separate die pads has a separate exposed surface on a bottom surface of said leadframe.

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